參數(shù)資料
型號: M30623M8P-XXXGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 14 MM, 0.65 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 33/104頁
文件大?。?/td> 1313K
代理商: M30623M8P-XXXGP
2. Central Processing Unit (CPU)
Rev.2.41
Jan 10, 2006
Page 32 of 96
REJ03B0001-0241
2.8.8
Stack Pointer Select Flag (U Flag)
ISP is selected when the U flag is “0”; USP is selected when the U flag is “1”.
The U flag is cleared to “0” when a hardware interrupt request is accepted or an INT instruction for software
interrupt Nos. 0 to 31 is executed.
2.8.9
Processor Interrupt Priority Level (IPL)
IPL is configured with three bits, for specification of up to eight processor interrupt priority levels from level 0
to level 7.
If a requested interrupt has priority greater than IPL, the interrupt is enabled.
2.8.10
Reserved Area
When write to this bit, write “0”. When read, its content is indeterminate.
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