Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Bus Control
33
Bus Control
The following explains the signals required for accessing external devices and software waits. The signals
required for accessing the external devices are valid when the processor mode is set to memory expansion
mode and microprocessor mode. The software waits are valid in all processor modes.
(1) Address bus/data bus
The address bus consists of the 20 pins A
0
to A
19
for accessing the 1M bytes of address space.
The data bus consists of the pins for data I/O. When the BYTE pin is “H”, the 8 ports D
0
to D
7
function
as the data bus. When BYTE is “L”, the 16 ports D
0
to D
15
function as the data bus.
When a change is made from single-chip mode to memory expansion mode, the value of the address
bus is undefined until external memory is accessed.
(2) Chip select signal
The chip select signal is output using the same pins as P4
4
to P4
7
. Bits 0 to 3 of the chip select control
register (address 0008
16
) set each pin to function as a port or to output the chip select signal. The chip
select control register is valid in memory expansion mode and microprocessor mode. In single-chip
mode, P4
4
to P4
7
function as programmable I/O ports regardless of the value in the chip select control
register.
In microprocessor mode, only CS0 outputs the chip select signal after the reset state has been can-
celled. CS1 to CS3 function as input ports. Figure 1.12.1 shows the chip select control register.
The chip select signal can be used to split the external area into as many as four blocks. Tables 1.12.1
and 1.12.2 show the external memory areas specified using the chip select signal.
Processor mode
Memory space
expansion mode
S
Memory expansion mode
Normal mode
(PM15,14=0,0)
Chip select signal
CS0
CS1
CS2
CS3
30000
16
to
CFFFF
16
(640K bytes)
Microprocessor mode
Memory expansion mode
Memory expansion mode
Expansion
mode 1
(PM15,14=1,0)
Expansion
mode 2
(PM15,14=1,1)
28000
16
to
2FFFF
16
(32K bytes)
08000
16
to
27FFF
16
(128K bytes)
04000
16
to
07FFF
16
(16K bytes)
Microprocessor mode
30000
16
to
FFFFF
16
(832K bytes)
04000
16
to
CFFFF
16
(816K bytes)
04000
16
to
FFFFF
16
(1008K bytes)
40000
16
to
BFFFF
16
(512K bytes X 7 +
256K bytes)
28000
16
to
3FFFF
16
(96K bytes)
Microprocessor mode
40000
16
to
FFFFF
16
(512K bytes X 8)
Table 1.12.1. External areas specified by the chip select signals
(A product having an internal RAM equal to or less than 15K bytes and a ROM equal to or less than 192K bytes)(Note)
Note :Be sure to set bit 3 (PM13) of processor mode register 1 to “0”.