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參數(shù)資料
| 型號(hào)： | M30612MC-211FP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Silver Mica Capacitor; Capacitance:240pF; Capacitance Tolerance: 5%; Series:CM05; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:5.9mm; Leaded Process Compatible:No RoHS Compliant: No |
| 中文描述： | 單片16位CMOS微機(jī) |
| 文件頁數(shù)： | 96/197頁 |
| 文件大小： | 2673K |
| 代理商： | M30612MC-211FP |
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Mitsubishi microcomputers
M16C / 61 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Clock synchronous serial I/O mode
96
(1) Clock synchronous serial I/O mode
The clock synchronous serial I/O mode uses a transfer clock to transmit and receive data. Table 1.17.2
and table 1.17.3 list the specifications of the clock synchronous serial I/O mode. Figure 1.17.9 shows the
UARTi transmit/receive mode register.
Table 1.17.2. Specifications of clock synchronous serial I/O mode (1)
Item
Transfer data format
Transfer data length: 8 bits
Transfer clock
When internal clock is selected (bit 3 at addresses 03A0
16
, 03A8
16
, 0378
16
= “0”) : fi/ 2(n+1)
(Note 1) fi = f
1
, f
8
, f
32
When external clock is selected (bit 3 at addresses 03A0
16
, 03A8
16
, 0378
16
= “1”) : Input from CLKi pin
Transmission/reception control
function/
RTS
function/
,
RTS
function chosen to be invalid
Transmission start condition
To start transmission, the following requirements must be met:
_
Transmit enable bit (bit 0 at addresses 03A5
16
, 03AD
16
, 037D
16
) = “1”
_
Transmit buffer empty flag (bit 1 at addresses 03A5
16
, 03AD
16
, 037D
16
) = “0”
_
When CTS function selected, CTS input level = “L”
Furthermore, if external clock is selected, the following requirements must also be met:
_
CLKi polarity select bit (bit 6 at addresses 03A4
16
, 03AC
16
, 037C
16
) = “0”:
CLKi input level = “H”
_
CLKi polarity select bit (bit 6 at addresses 03A4
16
, 03AC
16
, 037C
16
) = “1”:
CLKi input level = “L”
Reception start condition
To start reception, the following requirements must be met:
_
Receive enable bit (bit 2 at addresses 03A5
16
, 03AD
16
, 037D
16
) = “1”
_
Transmit enable bit (bit 0 at addresses 03A5
16
, 03AD
16
, 037D
16
) = “1”
_
Transmit buffer empty flag (bit 1 at addresses 03A5
16
, 03AD
16
, 037D
16
) = “0”
Furthermore, if external clock is selected, the following requirements must
also be met:
_
CLKi polarity select bit (bit 6 at addresses 03A4
16
, 03AC
16
, 037C
16
) = “0”:
CLKi input level = “H”
_
CLKi polarity select bit (bit 6 at addresses 03A4
16
, 03AC
16
, 037C
16
) = “1”:
CLKi input level = “L”
When transmitting
_
Transmit interrupt cause select bit (bits 0, 1 at address 03B0
16
, bit 4 at
address 037D
16
) = “0”: Interrupts requested when data transfer from UARTi
transfer buffer register to UARTi transmit register is completed
_
Transmit interrupt cause select bit (bits 0, 1 at address 03B0
16
, bit 4 at
address 037D
16
) = “1”: Interrupts requested when data transmission from
UARTi transfer register is completed
When receiving
_
Interrupts requested when data transfer from UARTi receive register to
UARTi receive buffer register is completed
Error detection
Overrun error (Note 2)
This error occurs when the next data is ready before contents of UARTi
receive buffer register are read out
Note 1: “n” denotes the value 00
16
to FF
16
that is set to the UART bit rate generator.
Note 2: If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also that
the UARTi receive interrupt request bit is not set to “1”.
Specification
_______
_______
Interrupt request
generation timing
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