參數(shù)資料
型號(hào): M30302MAL-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, PLASTIC, QFP-100
文件頁(yè)數(shù): 141/165頁(yè)
文件大?。?/td> 2188K
代理商: M30302MAL-XXXFP
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Timer A
77
Mitsubishi microcomputers
M16C / 30L Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timer A
Figure 1.14.3 shows the block diagram of timer A. Figures 1.14.4 to 1.14.6 show the timer A-related
registers.
Except in event counter mode, timers A0 through A2 all have the same function. Use the timer Ai mode
register (i = 0 to 2) bits 0 and 1 to choose the desired mode.
Timer A has the four operation modes listed as follows:
Timer mode: The timer counts an internal count source.
Event counter mode: The timer counts pulses from an external source or a timer overflow.
One-shot timer mode: The timer stops counting when the count reaches “000016”.
Pulse width modulation (PWM) mode: The timer outputs pulses of a given width.
Figure 1.14.4. Timer A-related registers (1)
Count start flag
(Address 038016)
Up count/down count
TAi
Addresses
TAj
TAk
Timer A0 038716 038616 Must not be set
Timer A1
Timer A1 038916 038816
Timer A0
Timer A2
Timer A2 038B16 038A16
Timer A1
Must not be set
Always down count except
in event counter mode
Reload register (16)
Counter (16)
Low-order
8 bits
High-order
8 bits
Clock source
selection
Timer
(gate function)
Timer
One shot
PWM
f1
f8
f32
TAiIN
(i = 0 to 2)
TB2 overflow
Event counter
fC32
Clock selection
TAj overflow
(j = i – 1. Note, however, must not be set when i = 0)
Pulse output
Toggle flip-flop
TAiOUT
(i = 0 to 2)
Data bus low-order bits
Data bus high-order bits
Up/down flag
Down count
(Address 038416)
TAk overflow
(k = i + 1. Note, however, must not be set when i = 2)
Polarity
selection
Clock selection
To external
trigger circuit
Timer Ai mode register
Symbol
Address
When reset
TAiMR(i=0 to 2)
039616 to 039816
0016
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
0 0 : Timer mode
0 1 : Event counter mode
1 0 : One-shot timer mode
1 1 : Pulse width modulation
(PWM) mode
b1 b0
TCK1
MR3
MR2
MR1
TMOD1
MR0
TMOD0
TCK0
Function varies with each operation mode
Count source select bit
(Function varies with each operation mode)
Operation mode select bit
Figure 1.14.3. Block diagram of timer A
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