參數(shù)資料
型號: M30201F6TFP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機
文件頁數(shù): 8/159頁
文件大?。?/td> 2319K
代理商: M30201F6TFP
Unde
Memory
deeopmen
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
8
Operation of Functional Blocks
The M30201 accommodates certain units in a single chip. These units include ROM and RAM to store
instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations. Also
included are peripheral units such as timers, serial I/O, A-D converter, and I/O ports.
The following explains each unit.
Memory
Figure 1.6 is a memory map of the M30201. The address space extends the 1M bytes from address
00000
16
to FFFFF
16
. From FFFFF
16
down is ROM. For example, in the M30201M4-XXXFP, there is 32K
bytes of internal ROM from F8000
16
to FFFFF
16
. The vector table for fixed interrupts such as the reset are
mapped to FFFDC
16
to FFFFF
16
. The starting address of the interrupt routine is stored here. The address
of the vector table for timer interrupts, etc., can be set as desired using the internal register (INTB). See the
section on interrupts for details.
From 00400
16
up is RAM. For example, in the M30201M4-XXXFP, there is 1K byte of internal RAM from
00400
16
to 007FF
16
. In addition to storing data, the RAM also stores the stack used when calling subrou-
tines and when interrupts are generated.
The SFR area is mapped to 00000
16
to 003FF
16
. This area accommodates the control registers for periph-
eral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Any part of the SFR area that is not
occupied is reserved and cannot be used for other purposes.
The special page vector table is mapped to FFE00
16
to FFFDB
16
. If the starting addresses of subroutines
or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions
can be used as 2-byte instructions, reducing the number of program steps.
Figure 1.6. Memory map
00000
16
YYYYY
16
FFFFF
16
00400
16
Internal RAM area
XXXXX
16
Internal ROM area
SFR area
For details, see
Figures 1.7 to 1.8
FFE00
16
FFFDC
16
FFFFF
16
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
Reset
Special page
vector table
Address
XXXXX
16
007FF
16
F8000
16
005FF
16
FC000
16
M30201M2
M30201M4
Type No.
Address
YYYYY
16
00BFF
16
F4000
16
M30201F6
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