參數(shù)資料
型號: M30201F6FP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機
文件頁數(shù): 134/159頁
文件大?。?/td> 2319K
代理商: M30201F6FP
Appendix Parallel I/O Mode
Peimnay
Unde
deeopmen
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
134
M30201(flash memory version)
M5M28F101
V
CC
V
SS
Address input
V
CC
V
SS
P6
0
to P6
3
, P3
0
to P3
3
,
P1
0
to P1
7
, P5
0
V
CC
V
SS
A
0
to A
15
, A
17
Data I/O
OE input
CE input
WE input
V
RFY
input (Note)
P0
0
to P0
7
P4
1
P4
3
P4
0
P5
1
D
0
to D
7
OE
CE
WE
Note: The V
RFY
input only selects read-only or read/write mode, and does not have any pin
associated with it on the M5M28F101.
Parallel I/O Mode
The parallel I/O mode is entered by making connections shown in Figures CC-2 and CC-3 and then turning
the V
PPH
power supply on. In this mode, the M30201 (flash memory version) operates in a manner similar
to the NOR flash memory M5M28F101 from Mitsubishi. Note, however, that there are some differences
with regard to the functions not available with the microcomputer (function of read device identification
code) and matters related to memory capacity.
Table CC-2 shows pin relationship between the M30201 and M5M28F101 in parallel I/O mode.
Table CC-2. Pin relationship in parallel I/O mode
SFR
RAM
SFR
RAM
SFR
RAM
00000
16
00400
16
YYYYY
16
DF000
16
DFDFF
16
XXXXX
16
FFFFF
16
M30201F6
XXXXX
16
F4000
16
YYYYY
16
00BFF
16
Microcomputer mode
Parallel I/O mode
CPU rewrite mode
Standard serial I/O mode
Boot ROM
area
(3.5K bytes)
Boot ROM
area
(3.5K bytes)
User ROM
area
User ROM
area
User ROM
area
Collective
erasable/
programmable
area
Type No.
Note 1: In CPU rewrite and standard serial I/O modes, the user ROM is the only erasable/programmable area.
Note 2: In parallel I/O mode, the area to be erased/programmed can be selected by the address A17 input.
The user ROM area is selected when this address input is high and the boot ROM area is selected
when this address input is low.
Collective
erasable/
programmable
area
Collective
erasable/
programmable
area
Figure CC-1. Block diagram of flash memory version
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