參數(shù)資料
型號(hào)： M2V64S40DTP-7
廠商： Mitsubishi Electric Corporation
英文描述： 64M Synchronous DRAM
中文描述： 6400同步DRAM
文件頁數(shù)： 30/52頁
文件大?。?/td> 674K
代理商： M2V64S40DTP-7
Apr. '99
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.1.2)
M2V64S20BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 4194304-WORD x 4-BIT)
M2V64S30BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 2097152-WORD x 8-BIT)
M2V64S40BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 1048576-WORD x 16-BIT)
64M bit Synchronous DRAM
30
AVERAGE SUPPLY CURRENT from Vdd
(Ta=0 ~ 70'C, Vdd = VddQ = 3.3 ± 0.3v, Vss = VssQ = 0v, Output Open, unless otherwise noted)
AC OPERATING CONDITIONS AND CHARACTERISTICS
(Ta=0 ~ 70'C, Vdd = VddQ = 3.3 ± 0.3v, Vss = VssQ = 0v, unless otherwise noted)
I
I
Symbol
Parameter
Test Conditions
Limits
Unit
Min.
Max.
VOH (DC)
High-Level Output Voltage (DC)
IOH=-2mA
2.4
V
VOL (DC)
Low-Level Output Voltage (DC)
IOL= 2mA
0.4
V
IOZ
Off-state Output Current
Q floating VO=0 ~ VddQ
-5
5
μA
Input Current (Note)
VIH = 0 ~ VddQ+0.3V
-5
5
μA
Symbol
Parameter
Test Conditions
Limits (max)
Unit
Icc1
operating current
(one bank active)
tRC=min, tCLK=min,
BL=1, I
OL
=0mA
mA
mA
Icc4
burst current
all banks active, tCLK=min,
BL=4,
CL=3
, I
OL
=0mA
mA
Icc5
auto-refresh current
tRC=min, tCLK=min
mA
-7
-7L
110
2
150
22
125
110
2
150
25
140
-8A
Icc6
self-refresh current
CKE <0.2v
mA
-7L,-8L,-10L
mA
1
0.5
-7,-8,-8A,-10
1
Organi-
zation
x4/x8
x16
115
115
x4/x8/x16
x4/x8
x16
115
135
x4/x8/x16
x4/x8/x16
-8
-8L
110
2
150
22
125
1
0.5
115
115
x4/x8/x16
-10
-10L
85
2
115
22
125
1
0.5
90
115
precharge standby current
in power-down mode
Icc2P
Icc2PS
1
1
x4/x8/x16
1
1
CKE=VILmax, tCLK=15ns
CKE=CLK=VILmax(fixed)
precharge standby current
in non power-down mode
mA
x4/x8/x16
Icc2N
CKE=/CS=VIHmin, tCLK=15ns (Note)
Icc2NS
x4/x8/x16
CKE=VIHmin,CLK=VILmax (fixed)
mA
2
1
55
2
1
55
x4/x8/x16
2
1
55
2
1
45
active standby current
in power-down mode
Icc3P
Icc3PS
x4/x8/x16
CKE=VILmax, tCLK=15ns
CKE=CLK=VILmax(fixed)
active standby current
in non power-down mode
(one bank active)
mA
x4/x8/x16
Icc3N
CKE=/CS=VIHmin, tCLK=15ns (Note)
Icc3NS
x4/x8/x16
CKE=VIHmin,CLK=VILmax (fixed)
Note:
Input signals are changed one time during 30ns.
40
40
40
40
20
20
20
20
Note: All other pins not under test are 0V.
相關(guān)PDF資料
PDF描述
M2V64S40DTP-7L 64M Synchronous DRAM
M2V64S40DTP-8 64M Synchronous DRAM
M2V64S40DTP-8L 64M Synchronous DRAM
M2V64S40TP 64M bit Synchronous DRAM
M2V64S40BTP 64M bit Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M2V64S40DTP-7L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M Synchronous DRAM
M2V64S40DTP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M Synchronous DRAM
M2V64S40DTP-8L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M Synchronous DRAM
M2V64S40TP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M bit Synchronous DRAM
M2V64S4DTP-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M Synchronous DRAM
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