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參數(shù)資料
| 型號： | M2V12D20TP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 512M Double Data Rate Synchronous DRAM |
| 中文描述： | 512M雙數(shù)據(jù)速率同步DRAM |
| 文件頁數(shù)： | 6/38頁 |
| 文件大?。?/td> | 754K |
| 代理商： | M2V12D20TP |
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MITSUBISHI
ELECTRIC
-6-
M2S12D20/ 30TP -75, -75L, -10, -10L
512M Double Data Rate Synchronous DRAM
Feb. '02
MITSUBISHI LSIs
DDR SDRAM (Rev.1.1)
MITSUBISHI ELECTRIC
COMMAND TRUTH TABLE
H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number
NOTE:
1. Applies only to read bursts while autoprecharge is disabled; this command is undefined (and should not be used) during
read bursts while autoprecharge is enabled, as well as write bursts.
2. BA0-BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode Register;BA0=1 ,
BA1 = 0 selects Extended Mode Register; other combinations of BA0-BA1 are reserved; A0-A12 provide the
op-codes to be written to the selected Mode Register.
COMMAND
MNEMONIC
CKE
n-1
H
CKE
n
X
/CS
/RAS
/CAS
/WE
BA0,1
A10
/AP
X
A0-9,
11-12
X
Deselect
DESEL
H
X
X
X
X
No Operation
NOP
H
X
L
H
H
H
X
X
X
Row Address Entry &
Bank Activate
ACT
H
H
L
L
H
H
V
V
V
Single Bank Precharge
PRE
H
H
L
L
H
L
V
L
X
Precharge All Banks
PREA
H
H
L
L
H
L
H
X
Column Address Entry
& Write
WRITE
H
H
L
H
L
L
V
L
V
Column Address Entry
& Write with
Auto-Precharge
Column Address Entry
& Read
Column Address Entry
& Read with
Auto-Precharge
WRITEA
H
H
L
H
L
L
V
H
V
READ
H
H
L
H
L
H
V
L
V
READA
H
H
L
H
L
H
V
H
V
Auto-Refresh
REFA
H
H
L
L
L
H
X
X
X
Self-Refresh Entry
REFS
H
L
L
L
L
H
X
X
X
Self-Refresh Exit
REFSX
L
H
H
X
X
X
X
X
X
L
H
L
H
H
H
X
X
X
Burst Terminate
TERM
H
H
L
H
H
L
X
X
X
Mode Register Set
MRS
H
H
L
L
L
L
L
L
V
X
note
1
2
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