參數(shù)資料
型號: M2V12D20TP-10
廠商: Mitsubishi Electric Corporation
英文描述: 128 x 64 pixel format, LED Backlight available
中文描述: 512M雙數(shù)據(jù)速率同步DRAM
文件頁數(shù): 18/38頁
文件大小: 754K
代理商: M2V12D20TP-10
MITSUBISHI
ELECTRIC
-18-
M2S12D20/ 30TP -75, -75L, -10, -10L
512M Double Data Rate Synchronous DRAM
Feb. '02
MITSUBISHI LSIs
DDR SDRAM (Rev.1.1)
MITSUBISHI ELECTRIC
AC TIMING REQUIREMENTS
(Ta=0 ~ 70
o
C, Vdd = VddQ = 2.5V +0.2V, Vss = VssQ = 0V, unless otherwise noted)
Min.
-0.75
Max
0.75
Min.
-0.8
Max
0.8
tAC
DQ Output Valid data delay time from CLK//CLK
ns
tDQSCK DQ Output Valid data delay time from CLK//CLK
-0.75
0.75
-0.8
0.8
ns
tCH
CLK High level width
0.45
0.55
0.45
0.55
ns
tCL
CLK Low level width
0.45
0.55
0.45
0.55
ns
CL=2.5
7.5
15
8
15
ns
CL=2
10
15
10
15
ns
tDS
Input Setup time (DQ,DM)
0.5
0.6
ns
tDH
Input Hold time(DQ,DM)
0.5
0.6
ns
tDIPW
DQ and DM input pulse width (for each input)
1.75
2
ns
tHZ
Data-out-high impedance time from CLK//CLK
-0.75
0.75
-0.8
0.8
ns
14
tLZ
Data-out-low impedance time from CLK//CLK
-0.75
0.75
-0.8
0.8
ns
14
tDQSQ
DQ Valid data delay time from DQS
0.5
0.6
ns
tHP
Clock half period
tCLmin or
tCHmin
tCLmin or
tCHmin
ns
tQH
Output DQS valid window
tHP-0.75
tHP-1.0
ns
tDQSS
Write command to first DQS latching transition
0.75
1.25
0.75
1.25
tCK
tDQSH
DQS input High level width
0.35
0.35
tCK
tDQSL
DQS input Low level width
0.35
0.35
tCK
tDSS
DQS falling edge to CLK setup time
0.2
0.2
tCK
tDSH
DQS falling edge hold time from CLK
0.2
0.2
tCK
tMRD
Mode Register Set command cycle time
15
15
ns
tWPRES Write preamble setup time
0
0
ns
16
tWPST
Write postamble
0.4
0.6
0.4
0.6
tCK
15
tWPRE
Write preamble
0.25
0.25
tCK
tIS
Input Setup time (address and control)
0.9
1.1
ns
19
tIH
Input Hold time (address and control)
0.9
1.1
ns
19
tRPST
Read postamble
0.4
0.6
0.4
0.6
tCK
tRPRE
Read preamble
0.9
1.1
0.9
1.1
tCK
-10
Unit
Notes
tCK
CLK cycle time
Symbol
AC Characteristics Parameter
-75
相關(guān)PDF資料
PDF描述
M2S12D30TP-10 128 x 64 pixel format, LED Backlight available
M2V12D30TP-10 128 x 64 pixel format, LED Backlight available
M2S12D20TP-10L 128 x 64 pixel format, LED Backlight available
M2V12D20TP-10L 128 x 64 pixel format, LED Backlight available
M2S12D30TP-10L 128 x 64 pixel format, LED Backlight available
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