4
MITSUBISHI ELECTRIC
Mar. '02
MITSUBISHI LSIs
DDR SDRAM
(Rev.1.44)
M2S56D20/ 30/ 40ATP -75AL, -75A, -75L, -75, -10L, -10
M2S56D20/ 30/ 40AKT -75AL, -75A, -75L, -75, -10L, -10
256M Double Data Rate Synchronous DRAM
Package Outline of sTSOP
33
1
9
*
64
32
1
Note)
1. DIMENSIONS "*1" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
A
0.125
+0.05
-0.02
1.2 MAX
Detail A (NTS)
0 - 10
0.125+0.075
0
(1)
0
0
0.25
Detail B (NTS)
0.35
0.55 MAX
13.1+0.1
*1
0.4 NOM
0.1
*3
0.16
+0.1
-0.05
B
0.08
M