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參數(shù)資料
| 型號(hào)： | M2S56D20ATP-10L |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 256M Double Data Rate Synchronous DRAM |
| 中文描述： | 256M雙數(shù)據(jù)速率同步DRAM |
| 文件頁數(shù)： | 8/40頁 |
| 文件大?。?/td> | 768K |
| 代理商： | M2S56D20ATP-10L |
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8
MITSUBISHI ELECTRIC
Mar. '02
MITSUBISHI LSIs
DDR SDRAM
(Rev.1.44)
M2S56D20/ 30/ 40ATP -75AL, -75A, -75L, -75, -10L, -10
M2S56D20/ 30/ 40AKT -75AL, -75A, -75L, -75, -10L, -10
256M Double Data Rate Synchronous DRAM
COMMAND TRUTH TABLE
H=High Level, L=Low Level, V=Valid, X=Don't Care, n=CLK cycle number
NOTE:
1. Applies only to read bursts while autoprecharge is disabled; this command is undefined (and should not be
used) during read bursts while autoprecharge is enabled, as well as during write bursts.
2. BA0-BA1 select either the Base or the Extended Mode Register (BA0 = 0, BA1 = 0 selects Mode
Register;BA0=1 ,BA1 = 0 selects Extended Mode Register; other combinations of BA0-BA1 are
reserved; A0-A12 provide the op-codes to be written to the selected Mode Register.
COMMAND
MNEMONIC
CKE
n-1
H
CKE
n
X
/CS
/RAS
/CAS
/WE BA0,1
A10
/AP
X
A0-9,
11-12
X
Deselect
DESEL
H
X
X
X
X
No Operation
NOP
H
X
L
H
H
H
X
X
X
Row Address Entry &
Bank Activate
ACT
H
H
L
L
H
H
V
V
V
Single Bank Precharge
PRE
H
H
L
L
H
L
V
L
X
Precharge All Banks
Column Address Entry
& Write
Column Address Entry
& Write with
Auto-Precharge
PREA
H
H
L
L
H
L
H
X
WRITE
H
H
L
H
L
L
V
L
V
WRITEA
H
H
L
H
L
L
V
H
V
Column Address Entry
& Read
Column Address Entry
& Read with
Auto-Precharge
READ
H
H
L
H
L
H
V
L
V
READA
H
H
L
H
L
H
V
H
V
Auto-Refresh
REFA
H
H
L
L
L
H
X
X
X
Self-Refresh Entry
REFS
H
L
L
L
L
H
X
X
X
Self-Refresh Exit
REFSX
L
L
H
H
H
H
H
L
L
X
H
H
X
H
H
X
H
L
X
X
X
X
X
X
X
X
X
Burst Terminate
TERM
Mode Register Set
MRS
H
H
L
L
L
L
L
L
V
X
note
1
2
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| M2S56D20ATP-75 | 256M Double Data Rate Synchronous DRAM |
| M2S56D20ATP-75A | 256M Double Data Rate Synchronous DRAM |
| M2S56D20ATP-75AL | 256M Double Data Rate Synchronous DRAM |
| M2S56D20ATP-75L | 256M Double Data Rate Synchronous DRAM |
| M2S56D20ATP75A | 256M Double Data Rate Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M2S56D20ATP-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2S56D20ATP75A | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2S56D20ATP-75A | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2S56D20ATP-75AL | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2S56D20ATP-75L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
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