- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄180125 > M29W800FB9N3F (NUMONYX) 512K X 16 FLASH 3V PROM, 90 ns, PDSO48 PDF資料下載
參數(shù)資料
| 型號： | M29W800FB9N3F |
| 廠商： | NUMONYX |
| 元件分類： | PROM |
| 英文描述： | 512K X 16 FLASH 3V PROM, 90 ns, PDSO48 |
| 封裝： | 12 X 20 MM, ROHS COMPLIANT, PLASTIC, TSOP-48 |
| 文件頁數(shù)： | 16/49頁 |
| 文件大?。?/td> | 936K |
| 代理商： | M29W800FB9N3F |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁
M29W800FT, M29W800FB
Status register
5.3
Error bit (DQ5)
The error bit can be used to identify errors detected by the program/erase controller. The
error bit is set to ’1’ when a program, block erase or chip erase operation fails to write the
correct data to the memory. If the error bit is set a Read/Reset command must be issued
before other commands are issued. The error bit is output on DQ5 when the status register
is read.
Note that the Program command cannot change a bit set to ’0’ back to ’1’ and attempting to
do so will set DQ5 to ‘1’. A bus read operation to that address will show the bit is still ‘0’. One
of the erase commands must be used to set all the bits in a block or in the whole memory
from ’0’ to ’1’
5.4
Erase timer bit (DQ3)
The erase timer bit can be used to identify the start of program/erase controller operation
during a Block Erase command. Once the program/erase controller starts erasing the erase
timer bit is set to ’1’. Before the program/erase controller starts the erase timer bit is set to ’0’
and additional blocks to be erased may be written to the command interface. The erase
timer bit is output on DQ3 when the status register is read.
5.5
Alternative toggle bit (DQ2)
The alternative toggle bit can be used to monitor the program/erase controller during erase
operations. The alternative toggle bit is output on DQ2 when the status register is read.
During chip erase and block erase operations the toggle bit changes from ’0’ to ’1’ to ’0’,
etc., with successive bus read operations from addresses within the blocks being erased. A
protected block is treated the same as a block not being erased. Once the operation
completes the memory returns to read mode.
During erase suspend the alternative toggle bit changes from ’0’ to ’1’ to ’0’, etc. with
successive bus read operations from addresses within the blocks being erased. Bus read
operations to addresses within blocks not being erased will output the memory cell data as if
in read mode.
After an erase operation that causes the error bit to be set the alternative toggle bit can be
used to identify which block or blocks have caused the error. The alternative toggle bit
changes from ’0’ to ’1’ to ’0’, etc. with successive bus read operations from addresses within
blocks that have not erased correctly. The alternative toggle bit does not change if the
addressed block has erased correctly.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M2CT-90A1-24ER | PUSHBUTTON SWITCH, DPST, MOMENTARY, PANEL MOUNT-THREADED |
| M2S56D30AKT-75 | 32M X 8 DDR DRAM, 0.75 ns, PDSO64 |
| M2V56S30ATP-6 | 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| M30-6000206 | 2 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
| M30-6000406 | 4 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M29W800FT70D11 | 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Gel-pak, waffle pack, wafer, diced wafer on film |
| M29W800FT70N3E | 制造商:Micron Technology Inc 功能描述:IC FLASH 8MBIT 70NS 48TSOP |
| M29W800FT70N3F | 制造商:Micron Technology Inc 功能描述:AUTOMOTIVE - Tape and Reel |
| M29W800FT70N3F TR | 制造商:Micron Technology Inc 功能描述:IC FLASH 8MBIT 70NS 48TSOP |
| M29W800FT70ZA3SE | 制造商:Micron Technology Inc 功能描述:AUTOMOTIVE - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH 8MBIT 70NS 48TFBGA |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。