參數(shù)資料
型號: M29W040-120N5R
廠商: 意法半導體
英文描述: Dual Low-Noise High-Speed Precision Operational Amplifier 16-TSSOP
中文描述: 4兆位512KB的× 8,統(tǒng)一座低電壓單電源閃存
文件頁數(shù): 15/31頁
文件大?。?/td> 205K
代理商: M29W040-120N5R
AI01365B
E
G
W
A0-A18
DQ0-DQ7
VALID
VALID
VCC
tVCHEL
tWHEH
tWHWL
tELWL
tAVWL
tWHGL
tWLAX
tWHDX
WRITE CYCLE
tDVWH
tWLWH
tGHWL
Figure 7. WriteAC Waveforms, W Controlled
Note:
Address are latched on the falling edge of W, Data is latched on the rising edge of W.
Program (PG) instruction.
The memory can be
programmed Byte-by-Byte. This instruction uses
four write cycles. The Program command A0h is
writtenon the thirdcycle aftertwo codedcycles. A
fourth write operation latches the Address on the
falling edge of W or E and the Data to be written
on its rising edge and startsthe P/E.C. During the
execution of the programby theP/E.C., the mem-
ory willnot acceptanyinstruction.Readoperations
output the status bits after the programming has
started. The status bits DQ5,DQ6 and DQ7 allow
a checkof thestatusof theprogrammingoperation.
Memoryprogrammingis madeonlyby writing ’0’in
place of ’1’ in a Byte.
Erase Suspend (ES) instruction.
The Block
Eraseoperationmaybe suspended bythisinstruc-
tion which consists of writing the command B0h
withoutanyspecificaddresscode.Nocodedcycles
are required.Itallowsreadingof datafromanother
block whileerase is in progress.Erasesuspend is
accepted only during the Block Erase instruction
executionand defaultsto readarraymode. Writing
thiscommandduringErasetimeoutwill,inaddition
to suspending the erase, terminate the timeout.
The ToggleBitDQ6stopstogglingwhentheP/E.C.
is suspended. ToggleBitstatusmustbemonitored
at anaddressout oftheblockbeingerased.Toggle
Bit will stoptoggling between 0.1
μ
s and 15
μ
s after
the Erase Suspend(ES) command has been writ-
ten.
The M29W040 will then automaticallyset to Read
Memory Array mode. When erase is suspended,
Read from blocks being erased will output invalid
data, Read from block not being erased is valid.
During the suspension the memory will respond
only to Erase Resume (ER) and Reset (RST) in-
structions. RST command will definitively abort
erasure and result in the invaliddata in the blocks
being erased.
EraseResume(ER)instruction.
IfanEraseSus-
pend instruction was previously executed, the
erase operation may be resumed by giving the
command 30h, at any address, and without any
codedcycles.
15/31
M29W040
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