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參數(shù)資料
| 型號： | M29F040-90XK5TR |
| 廠商： | 意法半導體 |
| 英文描述： | 4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
| 中文描述： | 4兆位512KB的× 8，統(tǒng)一座單電源閃存 |
| 文件頁數(shù)： | 9/31頁 |
| 文件大?。?/td> | 232K |
| 代理商： | M29F040-90XK5TR |
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AI01275B
3V
High Speed
0V
1.5V
2.4V
Standard
0.45V
2.0V
0.8V
Figure 4. AC Testing Input Output Waveform
AI01276B
1.3V
OUT
CL
CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
Figure 5. AC Testing Load Circuit
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
Note:
1. Sampled only, not 100% tested.
Table 10. Capacitance
(1)
(T
A
= 25
°
C, f = 1 MHz )
Erase Timer bit (DQ3).
This bit is set to ’0’ by the
P/E.C. when the last Block Erase command has
been entered to the Command Interface and it is
awaiting the Erase start. When the wait period is
finished, after 80 to 120
μ
s, DQ3 returns back to ’1’.
Coded Cycles.
The two coded cycles unlock the
Command Interface. They are followed by a com-
mand input or a comand confirmation. The coded
cycles consist of writing the data AAh at address
5555h during the first cycle and data 55h at address
2AAAh during the second cycle. Addresses are
latched on the falling edge of W or E while data is
latched on the rising edge of W or E. The coded
cycles happen on first and second cycles of the
command write or on the fourth and fifth cycles.
Read Array/Reset (RST) instruction.
The Reset
instruction consists of one write operation giving
the command F0h. It can be optionally preceded
by the two coded cycles. A wait state of 5
μ
s before
read operations is necessary if the Reset command
is applied during an Erase operation.
Read Electronic Signature (RSIG) instruction.
This instruction uses the two coded cycles followed
by one write cycle giving the command 90h to
address 5555h for command setup. A subsequent
read will output the manufacturer code, the device
code or the Block Protection status depending on
the levels of A0, A1, A6, A16, A17 and A18. The
manufacturer code, 20h, is output when the ad-
dresses lines A0, A1 and A6 are Low, the device
code, E2h is output when A0 is High with A1 and
A6 Low.
High Speed
Standard
Input Rise and Fall Times
≤
10ns
≤
10ns
Input Pulse Voltages
0 to 3V
0.45V to 2.4V
Input and Output Timing Ref. Voltages
1.5V
0.8V and 2V
Table 9. AC Measurement Conditions
9/31
M29F040
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| M29F040-90XK6R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
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| M29F040-90XN1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
| M29F040-90XN1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
| M29F040-90XN3R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit 512Kb x8, Uniform Block Single Supply Flash Memory |
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