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參數(shù)資料
| 型號： | M28F201-120XK1TR |
| 廠商： | 意法半導體 |
| 英文描述： | 9-Bit Parity Generators/Checkers 14-SOIC 0 to 70 |
| 中文描述： | 2 MB的256K × 8，芯片擦除閃存 |
| 文件頁數(shù)： | 2/21頁 |
| 文件大?。?/td> | 179K |
| 代理商： | M28F201-120XK1TR |
AI00638C
A
A13
A8
A9
A11
G
A10
E
D
17
A1
A0
DQ0
D
D
D
D
A7
A6
A5
A4
A3
A2
9
W
1
A
DQ7
A
A14
32
V
V
M28F201
A
D
25
V
Figure2A. LCC Pin Connections
A1
A2
A0
DQ0
A7
A6
A5
A4
A3
A13
A14
A17
W
VCC
A10
E
A8
A9
DQ7
DQ6
A11
G
DQ5
DQ4
DQ1
DQ2
DQ3
VSS
A16
A15
A12
VPP
AI00639C
M28F201
(Normal)
8
9
1
16
17
24
25
32
Figure 2B. TSOPPin Connections
DEVICEOPERATION
The M28F201 FLASHMemory product employs a
technologysimilar to a 2 Megabit EPROM but add
to the device functionality by providing electrical
erasure and programming. These functions are
managed by a command register. The functions
that are addressed via the command register de-
pend on the voltage applied to the V
PP
, program
voltage, input. When V
PP
is less than or equal to
6.5V, the command register is disabled and the
M28F201 functionsas a read only memory provid-
ing operating modes similar to an EPROM (Read,
Output Disable, Electronic Signature Read and
Standby).WhenV
PP
israisedto 12Vthecommand
register is enabled and this provides, in addition,
Eraseand Programoperations.
READ ONLY MODES, V
PP
≤
6.5V
For all Read Only Modes, except Standby Mode,
the Write Enable input W should be High. In the
StandbyMode thisinput is ’don’tcare’.
ReadMode.
TheM28F201has twoenableinputs,
E and G, both of which must be Low in order to
outputdatafrom the memory. The Chip Enable(E)
is the power control and shouldbe used for device
selection. Output Enable (G) is the output control
and should be used to gate data on to the output,
independantof the device selection.
A1
A2
A0
DQ0
A7
A6
A5
A4
A3
A13
A14
A17
W
VCC
A10
A8
A9
DQ7
DQ6
A11
G
E
DQ5
DQ4
DQ1
DQ2
DQ3
VSS
A16
A15
A12
VPP
AI00640D
M28F201
(Reverse)
8
9
16
17
24
25
32
1
Figure2C. TSOPReverse Pin Connections
2/21
M28F201
相關PDF資料 |
PDF描述 |
|---|---|
| M28F201-120XK6TR | 9-Bit Parity Generators/Checkers 14-SOIC 0 to 70 |
| M28F201-120XN1TR | 9-Bit Parity Generators/Checkers 14-SOIC 0 to 70 |
| M28F201-120XN3TR | 9-Bit Parity Generators/Checkers 14-SOIC 0 to 70 |
| M28F201-120XN6R | 9-Bit Parity Generators/Checkers 14-SOIC 0 to 70 |
| M28F201-120XN6TR | 9-Bit Parity Generators/Checkers 14-SOIC 0 to 70 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M28F201-120XK3R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120XK3TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120XK6R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120XK6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120XN1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
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