參數(shù)資料
型號(hào): M28C16-150P1T
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 16K 2K x 8 PARALLEL EEPROM with SOFTWARE DATA PROTECTION
中文描述: 16K的2K × 8的并行EEPROM,帶有軟件數(shù)據(jù)保護(hù)
文件頁數(shù): 1/18頁
文件大小: 129K
代理商: M28C16-150P1T
M28C16
16K (2K x 8) PARALLEL EEPROM
with SOFTWARE DATA PROTECTION
NOT FOR NEW DESIGN
November 1997
1/18
This is information on a product still in production butnot recommendedfor new design.
AI01518B
11
A0-A10
W
DQ0-DQ7
VCC
M28C16
G
E
VSS
8
RB *
Figure 1. Logic Diagram
A0 - A10
Address Input
DQ0 - DQ7
Data Input / Output
W
Write Enable
E
Chip Enable
G
Output Enable
RB
Ready / Busy
V
CC
Supply Voltage
V
SS
Ground
Table 1. Signal Names
FASTACCESS TIME: 90ns
SINGLE 5V
±
10%SUPPLY VOLTAGE
LOW POWERCONSUMPTION
FAST WRITE CYCLE:
– 64 Bytes Page WriteOperation
– Byte or Page Write Cycle: 3ms Max
ENHANCED END OF WRITE DETECTION:
– Data Polling
– ToggleBit
PAGE LOAD TIMER STATUS BIT
HIGH RELIABILITYSINGLE POLYSILICON,
CMOS TECHNOLOGY:
– Endurance>100,000Erase/Write Cycles
– Data Retention >40 Years
JEDEC APPROVEDBYTEWIDE PIN OUT
SOFTWARE DATA PROTECTION
M28C16 is replacedby the products
describedon the document M28C16A
DESCRIPTION
The M28C16 is a 2K x 8 low power Parallel
EEPROMfabricatedwithSGS-THOMSONproprie-
tary single polysilicon CMOS technology.The de-
vice offers fast access time with low power
dissipation and requires a 5V power supply. The
circuit has been designed to offer a flexible micro-
controller interface featuring both hardware and
softwarehandshakingwithDataPollingandToggle
Bit. The M28C16 supports 64 byte page write op-
eration. A Software Data Protection (SDP) is also
possibleusing the standardJEDEC algorithm.
24
1
PDIP24 (P)
PLCC32 (K)
TSOP28 (N)
8 x13.4mm
24
1
SO24 (MS)
300 mils
Note:
* RB function is offered only with TSOP28 package.
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