參數(shù)資料
型號(hào): M27V402-150N1TR
廠商: 意法半導(dǎo)體
英文描述: Quadruple 2-Input Positive-AND Gates 14-SOIC 0 to 70
中文描述: 4兆位的256Kb × 16低壓紫外線存儲(chǔ)器和OTP存儲(chǔ)器
文件頁(yè)數(shù): 5/15頁(yè)
文件大?。?/td> 101K
代理商: M27V402-150N1TR
5/15
M27V402
Table 7. Read Mode DC Characteristics
(1)
(TA = 0 to 70
°
C, –20 to 70
°
C, –20 to 85
°
C or –40 to 85
°
C; V
CC
= 3.3V
±
10%; V
PP
= V
CC
)
Symbol
Parameter
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
V
IN
V
CC
±
10
μ
A
I
LO
Output Leakage Current
0V
V
OUT
V
CC
±
10
μ
A
I
CC
Supply Current
E = V
IL
, G = V
IL
, I
OUT
= 0mA,
f = 5MHz, V
CC
= 3.6V
20
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC2
Supply Current (Standby) CMOS
E > V
CC
– 0.2V, V
CC
= 3.6V
20
μ
A
I
PP
Program Current
V
PP
= V
CC
10
μ
A
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH(2)
Input High Voltage
2
V
CC
+ 1
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= –400
μ
A
2.4
V
Output High Voltage CMOS
I
OH
= –100
μ
A
V
CC
–0.7V
V
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs requirecareful decoupling of the
devices. The supply current, I
CC
, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the fallingand rising edgesof E. The magnitude of
the transient current peaks is dependent on the
output capacitive and inductive loading of the de-
vice.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1
μ
F ceramic
capacitor be used on every device between V
CC
and V
SS
. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7
μ
F bulk electrolytic capacitor should be
used between V
CC
and V
SS
for every eight devic-
es. The bulk capacitor should be located near the
power supply connection point.Thepurpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27V402 are in the ’1’
state. Data is introduced by selectively program-
ming ’0’s into the desired bit locations. Although
only ’0’s will be programmed, both ’1’s and ’0’s can
be present in the data word. The only way to
change a ’0’ to a ’1’is by die exposure to ultraviolet
light (UV EPROM). The M27V402 is in the pro-
gramming mode when V
PP
input is at 12.75V, Gia
at V
IH
and E is pulsed to V
IL
. The data to be pro-
grammed is applied to16 bitsin parallelto thedata
output pins.
The levels required for the address and data in-
puts are TTL. V
CC
is specified to be 6.25V
±
0.25V.
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