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參數(shù)資料
| 型號： | M27V320-150M1 |
| 廠商： | 意法半導體 |
| 英文描述： | 32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| 中文描述： | 32兆位4Mb的x8或檢察官辦公室的2Mb x16存儲器 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 144K |
| 代理商： | M27V320-150M1 |
5/15
M27V320
Table 7. Read Mode DC Characteristics
(1)
(T
A
= 0 to 70°C or –40 to 85°C; V
CC
= 3.3V ± 10%; V
PP
= V
CC
)
Symbol
Parameter
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
≤
V
IN
≤
V
CC
±1
μA
I
LO
Output Leakage Current
0V
≤
V
OUT
≤
V
CC
±10
μA
I
CC
Supply Current
E = V
IL
, GV
PP
= V
IL
, I
OUT
= 0mA,
f = 5MHz, V
CC
≤
3.6V
30
mA
I
CC
1
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC
2
Supply Current (Standby) CMOS
E > V
CC
– 0.2V, V
CC
≤
3.6V
60
μA
I
PP
Program Current
V
PP
= V
CC
10
μA
V
IL
Input Low Voltage
–0.6
0.2V
CC
V
V
IH
(2)
Input High Voltage
0.7V
CC
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= –400μA
2.4
V
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while GV
PP
should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current I
CC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E.
The magnitude of the transient current peaks is
dependent on the capacitive and inductive loading
of the device outputs. The associated transient
voltage peaks can be suppressed by complying
with the two line output control and by properly se-
lected decoupling capacitors. It is recommended
that a 0.1μF ceramic capacitor is used on every
device between V
CC
and V
SS
. This should be a
high frequency type of low inherent inductance
and should be placed as close as possible to the
device. In addition, a 4.7μF electrolytic capacitor
should be used between V
CC
and V
SS
for every
eight devices. This capacitor should be mounted
near the power supply connection point. The pur-
pose of this capacitor is to overcome the voltage
drop caused by the inductive effects of PCB trac-
es.
相關PDF資料 |
PDF描述 |
|---|---|
| M27V320-150N6 | 2.5-V/3.3-V 20-Bit Buffers/Drivers With 3-State Outputs 56-SSOP -40 to 85 |
| M27V320-150N1 | 2.5-V/3.3-V 20-Bit Buffers/Drivers With 3-State Outputs 56-TVSOP -40 to 85 |
| M27V320-150M6 | 2.5-V/3.3-V 20-Bit Buffers/Drivers With 3-State Outputs 56-TVSOP -40 to 85 |
| M27V320-120N6 | 32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| M27V320-120N1 | 2.5-V/3.3-V 20-Bit Buffers/Drivers With 3-State Outputs 56-TSSOP -40 to 85 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M27V320-150M6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| M27V320-150N1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| M27V320-150N6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| M27V322 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16 Low Voltage UV EPROM and OTP EPROM |
| M27V322_06 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit (2Mb 】16) low-voltage UV EPROM and OTP EPROM |
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