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參數(shù)資料
| 型號(hào)： | M27V320-120M1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| 中文描述： | 32兆位4Mb的x8或檢察官辦公室的2Mb x16存儲(chǔ)器 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 144K |
| 代理商： | M27V320-120M1 |
M27V320
10/15
PRESTO III Programming Algorithm
The PRESTO III Programming Algorithm allows
the whole array to be programed with a guaran-
teed margin in a typical time of 100 seconds. Pro-
gramming with PRESTO III consists of applying a
sequence of 50μs program pulses to each word
until a correct verify occurs (see Figure 11). During
programing and verify operation a MARGIN
MODE circuit must be activated to guarantee that
each cell is programed with enough margin. No
overprogram pulse is applied since the verify in
MARGIN MODE provides the necessary margin to
each programmed cell.
Program Inhibit
Programming of multiple M27V320s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including GV
PP
of the par-
allel M27V320 may be common. A TTL low level
pulse applied to a M27V320's E input and V
PP
at
12V, will program that M27V320. A high level E in-
put inhibits the other M27V320s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with
GV
PP
at V
IL
. Data should be verified with t
ELQV
af-
ter the falling edge of E.
Figure 10. Programming and Verify Modes AC Waveforms
Note: BYTE = V
IH
; GV
PP
High level = 12V.
tAVEL
VALID
AI02205
A0-A20
Q0-Q15
VCC
DATA IN
DATA OUT
E
tQVEL
tVCHEL
tVPHEL
tEHQX
tEHVPX
tELQV
tELEH
tEHQZ
tVPLEL
PROGRAM
VERIFY
GVPP
tEHAX
Figure 11. Programming Flowchart
AI05820
n = 0
Last
Addr
VERIFY
E = 50
μ
s Pulse
++n
= 25
++ Addr
VCC = 6.25V, VPP = 12V
FAIL
CHECK ALL WORDS
BYTE = VIH
1st: VCC = 5V
2nd: VCC = 3V
YES
NO
YES
NO
YES
NO
SET MARGIN MODE
RESET MARGIN MODE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M27V320-150M1 | 32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| M27V320-150N6 | 2.5-V/3.3-V 20-Bit Buffers/Drivers With 3-State Outputs 56-SSOP -40 to 85 |
| M27V320-150N1 | 2.5-V/3.3-V 20-Bit Buffers/Drivers With 3-State Outputs 56-TVSOP -40 to 85 |
| M27V320-150M6 | 2.5-V/3.3-V 20-Bit Buffers/Drivers With 3-State Outputs 56-TVSOP -40 to 85 |
| M27V320-120N6 | 32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M27V320-120M6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| M27V320-120N1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| M27V320-120N6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| M27V320-150M1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
| M27V320-150M6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM |
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