參數(shù)資料
型號: M27V160-200M6TR
廠商: 意法半導(dǎo)體
英文描述: 16 Mbit 2Mb x8 or 1Mb x16 Low Voltage UV EPROM and OTP EPROM
中文描述: 16兆位的2Mb x8或1兆x16低壓紫外線可擦寫可編程只讀存儲器和OTP存儲器
文件頁數(shù): 5/15頁
文件大小: 103K
代理商: M27V160-200M6TR
5/15
M27V160
Table 7. Read Mode DC Characteristics
(1)
(T
A
= 0 to 70
°
C or –40 to 85
°
C; V
CC
= 3.3V
±
10%; V
PP
= V
CC
)
Symbol
Parameter
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
V
IN
V
CC
±
1
μ
A
I
LO
Output Leakage Current
0V
V
OUT
V
CC
±
10
μ
A
I
CC
Supply Current
E = V
IL
, G = V
IL
, I
OUT
= 0mA,
f = 8MHz, V
CC
3.6V
30
mA
E = V
IL
, G = V
IL
, I
OUT
= 0mA,
f = 5MHz, V
CC
3.6V
20
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC2
Supply Current (Standby) CMOS
E > V
CC
– 0.2V, V
CC
3.6V
60
μ
A
I
PP
Program Current
V
PP
= V
CC
10
μ
A
V
IL
Input Low Voltage
–0.3
0.2V
CC
V
V
IH(2)
Input High Voltage
0.7V
CC
V
CC
+ 1
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= –400
μ
A
2.4
V
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs requirecareful decoupling of the
supplies to the devices. The supply current I
CC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E. The magnitude of the
transient current peaks is dependent on the ca-
pacitive and inductive loading of the device out-
puts. The associated transient voltage peaks can
be suppressed by complying with the two line out-
put control and by properly selected decoupling
capacitors. It is recommended that a 0.1
μ
F ceram-
ic capacitor is used on every device between V
CC
and V
SS
. This should be a high frequency type of
low inherent inductance and should be placed as
close as possible to the device. In addition, a
4.7
μ
F electrolytic capacitor should be used be-
tween V
CC
and V
SS
for every eight devices. This
capacitor should be mounted near the power sup-
ply connection point. The purpose of this capacitor
is to overcome the voltage drop caused by the in-
ductive effects of PCB traces.
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