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參數(shù)資料
| 型號： | M27C64A-15K6X |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 8K X 8 OTPROM, 150 ns, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 107K |
| 代理商： | M27C64A-15K6X |
M27C64A
6/14
Table 8. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C: VCC = 5V ± 10%; VPP = VCC)
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
Symbol
Alt
Parameter
Test Condition
M27C64A
Unit
-10
-15
-20
Min
Max
Min
Max
Min
Max
tAVQV
tACC
Address Valid to Output
Valid
E = VIL, G = VIL
100
150
200
ns
tELQV
tCE
Chip Enable Low to
Output Valid
G = VIL
100
150
200
ns
tGLQV
tOE
Output Enable Low to
Output Valid
E = VIL
50
75
80
ns
tEHQZ
(2)
tDF
Chip Enable High to
Output Hi-Z
G = VIL
050050050
ns
tGHQZ
(2)
tDF
Output Enable High to
Output Hi-Z
E = VIL
050050050
ns
tAXQX
tOH
Address Transition to
Output Transition
E = VIL, G = VIL
000
ns
Table 9. Read Mode AC Characteristics (1)
(TA = 0 to 70 °C or –40 to 85 °C: VCC = 5V ± 10%; VPP = VCC)
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
Symbol
Alt
Parameter
Test Condition
M27C64A
Unit
-25
-30
Min
Max
Min
Max
tAVQV
tACC
Address Valid to Output
Valid
E = VIL, G = VIL
250
300
ns
tELQV
tCE
Chip Enable Low to Output
Valid
G = VIL
250
300
ns
tGLQV
tOE
Output Enable Low to
Output Valid
E = VIL
100
120
ns
tEHQZ
(2)
tDF
Chip Enable High to
Output Hi-Z
G = VIL
0600
105
ns
tGHQZ
(2)
tDF
Output Enable High to
Output Hi-Z
E = VIL
0600
105
ns
tAXQX
tOH
Address Transition to
Output Transition
E = VIL, G = VIL
00
ns
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