參數(shù)資料
型號(hào): M27C4002-70XB1X
廠商: 意法半導(dǎo)體
英文描述: 4 Mbit (256Kb x16) UV EPROM and OTP EPROM
中文描述: 4兆位(256Kb的× 16)紫外線存儲(chǔ)器和OTP存儲(chǔ)器
文件頁(yè)數(shù): 9/18頁(yè)
文件大?。?/td> 184K
代理商: M27C4002-70XB1X
9/18
M27C4002
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 26.5 seconds. Pro-
gramming with PRESTO II consists of applying a
sequence of 100μs program pulses to each byte
until a correct verify occurs (see Figure 7). During
programming and verify operation, a MARGIN
MODE circuit is automatically activated in order to
guarantee that each cell is programmed with
enough margin. No overprogram pulse is applied
since the verify in MARGIN MODE provides nec-
essary margin to each programmed cell.
Program Inhibit
Programming of multiple M27C4002s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C4002 may be common. A TTL low level
pulse applied to a M27C4002's E input, with V
PP
at 12.75V, will program that M27C4002. A high
level E input inhibits the other M27C4002s from
being programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
at V
IL
, E at V
IH
, V
PP
at 12.75V and V
CC
at 6.25V.
Figure 6. Programming and Verify Modes AC Waveforms
tAVEL
VALID
AI00730
A0-A17
Q0-Q15
VPP
VCC
G
DATA IN
DATA OUT
E
tQVEL
tVPHEL
tVCHEL
tEHQX
tELEH
tGLQV
tQXGL
tGHQZ
tGHAX
PROGRAM
VERIFY
Figure 7. Programming Flowchart
AI00726C
n = 0
Last
Addr
VERIFY
E = 100
μ
s Pulse
++n
= 25
++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL WORDS
1st: VCC = 6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO
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