參數(shù)資料
型號: M27C160-100K6TR
廠商: 意法半導體
英文描述: 16-Bit Transparent D-Type Flip-Flop
中文描述: 16兆位的2Mb x8或1兆x16紫外線存儲器和OTP存儲器
文件頁數(shù): 5/16頁
文件大?。?/td> 110K
代理商: M27C160-100K6TR
5/16
M27C160
Table 7. Read Mode DC Characteristics
(1)
(T
A
= 0 to 70
°
C or –40 to 85
°
C; V
CC
= 5V
±
5% or 5V
±
10%; V
PP
= V
CC
)
Symbol
Parameter
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
V
IN
V
CC
±
1
μ
A
I
LO
Output Leakage Current
0V
V
OUT
V
CC
±
10
μ
A
I
CC
Supply Current
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 8MHz
70
mA
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 5MHz
50
mA
I
CC1
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC2
Supply Current (Standby) CMOS
E > V
CC
– 0.2V
100
μ
A
I
PP
Program Current
V
PP
= V
CC
10
μ
A
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH(2)
Input High Voltage
2
V
CC
+ 1
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4
V
V
OH
Output High Voltage TTL
I
OH
= –400
μ
A
2.4
V
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require carefull decoupliing of
the suppliesto the devices. Thesupply current I
CC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E.
The magnitude of the transient current peaks is
dependant on the capacititive and inductive load-
ing of thedevice outputs. The associated transient
voltage peaks can be supressed by complying
with thetwo line output control and by properly se-
lected decoupling capacitors. It is recommended
that a 0.1
μ
F ceramic capacitor is used on every
device between V
CC
and V
SS
. This should be a
high frequency type of low inherent inductance
and should be placed as close as possible to the
device. In addition, a 4.7
μ
F electrolytic capacitor
should be used between V
CC
and V
SS
for every
eight devices.
This capacitor should be mounted near the power
supply connection point. The purpose of this ca-
pacitor is to overcome the voltage drop caused by
the inductive effects of PCB traces.
Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27C160 are in the ’1’
state. Data is introduced by selectively program-
ming ’0’s into the desired bit locations. Although
only ’0’s will be programmed, both ’1’s and ’0’s can
be present in the data word. The only way to
change a ’0’ to a ’1’is by die exposition to ultravio-
let light (UV EPROM). The M27C160 is in the pro-
gramming mode when V
PP
input is at 12.5V, G is
at V
IH
and E is pulsed to V
IL
. The data to be pro-
grammed is applied to16 bitsin parallelto thedata
output pins. The levels required for the address
and data inputs are TTL. V
CC
is specified to be
6.25V
±
0.25V.
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