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參數(shù)資料
| 型號： | M25P20VMN6T |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 22/34頁 |
| 文件大?。?/td> | 217K |
| 代理商： | M25P20VMN6T |
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M25P05-A
22/34
POWER-UP AND POWER-DOWN
At Power-up and Power-down, the device must
not be selected (that is Chip Select (S) must follow
the voltage applied on V
CC
) until V
CC
reaches the
correct value:
– V
CC
(min) at Power-up, and then for a further de-
lay of t
VSL
– V
SS
at Power-down
Usually a simple pull-up resistor on Chip Select (S)
can be used to insure safe and proper Power-up
and Power-down.
To avoid data corruption and inadvertent write
operations during power up, a Power On Reset
(POR) circuit is included. The logic inside the
device is held reset while V
CC
is less than the POR
threshold value, V
WI
– all operations are disabled,
and the device does not respond to any
instruction.
Moreover, the device ignores all Write Enable
(WREN), Page Program (PP), Sector Erase (SE),
Bulk Erase (BE) and Write Status Register
(WRSR) instructions until a time delay of t
PUW
has
elapsed after the moment that V
CC
rises above the
V
WI
threshold. However, the correct operation of
the device is not guaranteed if, by this time, V
CC
is
still below V
CC
(min). No Write Status Register,
Program or Erase instructions should be sent until
the later of:
– t
PUW
after V
CC
passed the V
WI
threshold
– t
VSL
afterV
CC
passed the V
CC
(min) level
These values are specified in Table 7.
If the delay, t
VSL
, has elapsed, after V
CC
has risen
above V
CC
(min), the device can be selected for
READ instructions even if the t
PUW
delay is not yet
fully elapsed.
At Power-up, the device is in the following state:
– The device is in the Standby mode (not the
Deep Power-down mode).
– The Write Enable Latch (WEL) bit is reset.
Normal precautions must be taken for supply rail
decoupling, to stablise the V
CC
feed. Each device
in a system should have the V
CC
rail decoupled by
a suitable capacitor close to the package pins.
(Generally, this capacitor is of the order of 0.1μF).
At Power-down, when V
CC
drops from the
operating voltage, to below the POR threshold
value, V
WI
, all operations are disabled and the
device does not respond to any instruction. (The
designer needs to be aware that if a Power-down
occurs while a Write, Program or Erase cycle is in
progress, some data corruption can result.)
Figure 20. Power-up Timing
VCC
AI04009C
VCC(min)
VWI
Reset State
of the
Device
Chip Selection Not Allowed
Program, Erase and Write Commands are Rejected by the Device
tVSL
tPUW
time
Read Access allowed
Device fully
accessible
VCC(max)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M25P20VMP6T | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40VMN6T | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P80VMN6T | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P32 | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P40 | 4 Mbit Uniform Sector, Serial Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M25P20-VMN6T | 功能描述:閃存 3.0V 2M (256Kx8) RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M25P20VMN6TG | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P20-VMN6TG/X | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:2 Mbit, low voltage, Serial Flash memory with 50MHz SPI bus interface |
| M25P20VMN6TP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P20-VMN6TP | 功能描述:閃存 Lo-Volt 2M (256Kx8) RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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