參數(shù)資料
型號: M24C16EA1T
廠商: 意法半導體
元件分類: DC/DC變換器
英文描述: RSD Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 24V; Output Voltage (Vdc): 05V; Power: 1W; 1kVDC and 3kVDC Isolation Options; Approved for Medical Applications; Suitable for Automated Assembly; 8, 10 and 12 pin Pinning Style Options; Optional Continuous Short Circuit Protected; Efficiency to 85%
中文描述: 16Kbit,8Kbit,4Kbit,2Kbit和1Kbit串行I2C總線的EEPROM
文件頁數(shù): 11/25頁
文件大?。?/td> 449K
代理商: M24C16EA1T
11/25
M24C16, M24C08, M24C04, M24C02, M24C01
Sequential Read
This operation can be used after a Current Ad-
dress Read or a Random Address Read. The bus
master
does
acknowledge the data byte output,
and sends additional clock pulses so that the de-
vice continues to output the next byte in sequence.
To terminate the stream of bytes, the bus master
must
not
acknowledge the last byte, and
must
generate a Stop condition, as shown in
Figure 10.
.
The output data comes from consecutive address-
es, with the internal address counter automatically
incremented after each byte output. After the last
memory address, the address counter ‘rolls-over’,
and the device continues to output data from
memory address 00h.
Acknowledge in Read Mode
For all Read commands, the device waits, after
each byte read, for an acknowledgment during the
9
th
bit time. If the bus master does not drive Serial
Data (SDA) Low during this time, the device termi-
nates the data transfer and switches to its Stand-
by mode.
INITIAL DELIVERY STATE
The device is delivered with all bits in the memory
array set to 1 (each byte contains FFh).
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相關代理商/技術參數(shù)
參數(shù)描述
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