參數(shù)資料
型號: M24164-MN1
廠商: 意法半導(dǎo)體
英文描述: 16 Kbit Serial I2C BUS EEPROM
中文描述: 16千位串行I2C總線的EEPROM
文件頁數(shù): 6/21頁
文件大?。?/td> 135K
代理商: M24164-MN1
M24164
6/21
Figure 7. Write Mode Sequences with WC=1 (data write inhibited)
Write Operations
Following a Start condition the bus master sends
a Device Select Code with the RW bit reset to 0.
The device acknowledges this, as shown in Figure
8, and waits for an address byte. The device re-
sponds to the address byte with an acknowledge
bit, and then waits for the data byte.
Writing to the memory may be inhibited if Write
Control (WC) is driven High. Any Write instruction
with Write Control (WC) driven High (during a pe-
riod of time from the Start condition until the end of
the address byte) will not modify the memory con-
tents, and the accompanying data bytes are not
acknowledged, as shown in Figure 7.
When the bus master generates a Stop condition
immediately after the Ack bit (in the “10
th
bit” time
slot), either at the end of a Byte Write or a Page
Write, the internal memory Write cycle is triggered.
A Stop condition at any other time slot does not
trigger the internal Write cycle.
During the internal Write cycle, Serial Data (SDA)
is disabled internally, and the device does not re-
spond to any requests.
Byte Write
After the Device Select code and the address byte,
the bus master sends one data byte. If the ad-
dressed location is Write-protected, by Write Con-
trol (WC) being driven High, the device replies with
NoAck, and the location is not modified. If, instead,
the addressed location is not Write-protected, the
device replies with Ack. The bus master termi-
nates the transfer by generating a Stop condition,
as shown in Figure 8.
Page Write
The Page Write mode allows up to 16 bytes to be
written in a single Write cycle, provided that they
are all located in the same ’row’ in the memory:
S
S
Byte Write
DEV SEL
BYTE ADDR
DATA IN
WC
S
Page Write
DEV SEL
BYTE ADDR
DATA IN 1
DATA IN 2
WC
DATA IN 3
AI02803C
Page Write
(cont'd)
WC (cont'd)
S
DATA IN N
ACK
ACK
NO ACK
R/W
ACK
ACK
NO ACK
NO ACK
R/W
NO ACK
NO ACK
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