參數資料
型號： M24128-BWMW6
廠商： 意法半導體
元件分類： DRAM
英文描述： 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
中文描述： 256Kbit和128Kbit的EEPROM串行I2C總線具有三個芯片使能線
文件頁數： 6/17頁
文件大?。?/td> 135K
代理商： M24128-BWMW6
M24256, M24128
6/17
Figure 6. Write Mode Sequences with WC=0 (data write enabled)
S
S
BYTE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN
WC
S
PAGE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN 1
WC
DATA IN 2
AI01106B
PAGE WRITE
(cont'd)
WC (cont'd)
S
DATA IN N
ACK
R/W
ACK
ACK
ACK
ACK
ACK
ACK
ACK
R/W
ACK
ACK
Write Operations
Following a START condition the master sends a
Device Select Code with the RW
bit set to ’0’, as
shown in Table 4. The memory acknowledges this,
and waits for two address bytes. The memory re-
sponds to each address byte with an acknowledge
bit, and then waits for the data byte.
Writing to the memory may be inhibited if the WC
input pin is taken high. Any write command with
WC=1 (during a period of time from the START
condition until the end of the two address bytes)
will not modify the memory contents, and the ac-
companying data bytes will
not
be acknowledged,
as shown in Figure 5.
Byte Write
In the Byte Write mode, after the Device Select
Code and the address bytes, the master sends
one data byte. If the addressed location is write
protected by the WC pin, the memory replies with
a NoAck, and the location is not modified. If, in-
stead, the WC pin has been held at 0, as shown in
Figure 6, the memory replies with an Ack. The
master terminates the transfer by generating a
STOP condition.
Page Write
The Page Write mode allows up to 64 bytes to be
written in a single write cycle, provided that they
are all located in the same ’row’ in the memory:
that is the most significant memory address bits
(b14-b6 for the M24256 and b13-b6 for the
M24128) are the same. If more bytes are sent than
Table 5. Most Significant Byte
Note: 1.
b15 is treated as Don’t Care on the M24256 series.
b15 and b14 are Don’t Care on the M24128 series.
Table 6. Least Significant Byte
b15
b14
b13
b12
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
相關PDF資料
PDF描述
M24128-BWMN6TP Displays
M24128-BWBN6T 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
M24128-BWBN6P 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
M24128-BWBN6G 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
M24128-BWBN6 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
相關代理商/技術參數
參數描述
M24128-BWMW6G 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
M24128-BWMW6P 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
M24128-BWMW6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
M24128-BWMW6TG 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
M24128-BWMW6TP 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*