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| 型號(hào)： | M2050-11I622.0800 |
| 廠(chǎng)商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | XO, clock |
| 英文描述： | VOLTAGE CONTROLLED CLOCK SAW OSCILLATOR, 622.08 MHz |
| 封裝： | LEADLESS, CERAMIC PACKAGE-36 |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大小： | 504K |
| 代理商： | M2050-11I622.0800 |
M2050/51/52 Datasheet Rev 1.0
11 of 12
Revised 23Jun2005
M2050/51/52
SAW PLL FOR 10GBE 64B/66B FEC
Preliminar y In f o r m atio n
ELECTRICAL SPECIFICATIONS (CONTINUED)
PARAMETER MEASUREMENT INFORMATION
Output Rise and Fall Time
Figure 6: Output Rise and Fall Time
Output Duty Cycle
Figure 7: Output Duty Cycle
AC Characteristics
Unless stated otherwise, V
CC = 3.3V +5%,TA = 0
oC to +70 oC (commercial), T
A = -40
oC to +85 oC (industrial), F
VCSO = FOUT = 622-675MHz,
LVPECL outputs terminated with 50
to V
CC - 2V
Symbol Parameter
Min
Typ
Max
Unit Conditions
F
IN
Input Frequency
DIF_REF0, nDIF_REF0,
DIF_REF1, nDIF_REF1
10
700
MHz
F
OUT
Output Frequency
FOUT0, nFOUT0, FOUT1, nFOUT1
15
700
MHz
APR
VCSO Absolute
Pull-Range
Commercial
±120
±200
ppm
Industrial
±50
±150
ppm
PLL Loop
Constants 1
Note 1: Parameters needed for PLL Simulator software; see Tables 9, 10, and 11, Example External Loop Filter Component Values, on pg. 8.
K
VCO
VCO Gain
800
kHz/V
R
IN
Internal Loop Resistor
Wide Bandwidth
100
k
Narrow Bandwidth
2100
k
BW
VCSO
VCSO Bandwidth
700
kHz
Phase Noise
and Jitter
Φ n
Single Side Band
Phase Noise
@625.00MHz
1kHz Offset
-72
dBc/Hz
Fin=25.00 MHz
Mfin=25,
Mfec=Rfec
10kHz Offset
-94
dBc/Hz
100kHz Offset
-123
dBc/Hz
J(t)
Jitter (rms)
@625.00MHz
12kHz to 20MHz
0.25
0.5
ps
50kHz to 80MHz
0.25
0.5
ps
odc
Output Duty Cycle 2
FOUT0, nFOUT0,
FOUT1, nFOUT1
Note 2: See Parameter Measurement Information on pg. 11.
P = 5 or 25
35
40
65
%
P = 1 or 4
40
50
60
%
t
R
Output Rise Time 2
FOUT0, nFOUT0, FOUT1, nFOUT1
200
450
500
ps
20% to 80%
t
F
Output Fall Time 2
200
450
500
ps
20% to 80%
Table 15: AC Characteristics
20%
80%
tR
20%
tF
80%
Clock Output
V
P
-P
nFOUT
FOUT
t
PW
t
PERIOD
(Output Pulse Width)
tPERIOD
tPW
odc =
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