參數(shù)資料
型號： M2050-11-627.3296
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： XO, clock
英文描述： VOLTAGE CONTROLLED CLOCK SAW OSCILLATOR, 627.3296 MHz
封裝： LEADLESS, CERAMIC PACKAGE-36
文件頁數(shù)： 11/12頁
文件大?。?/td> 504K
代理商： M2050-11-627.3296
M2050/51/52 Datasheet Rev 1.0
8 of 12
Revised 23Jun2005
M2050/51/52
SAW PLL FOR 10GBE 64B/66B FEC
Preliminar y In f o r m atio n
External Loop Filter
To provide stable PLL operation, the M2050/51/52
requires the use of an external loop filter. This is
provided via the provided filter pins (see Figure 5).
Due to the differential signal path design, the
implementation requires two identical complementary
RC filters as shown here.
PLL bandwidth is affected by the “Mfec” value and the
“Mfin” value, as well as the VCSO frequency. The
FEC_SEL
setting can be used to actively change PLL loop
bandwidth in a given application. See “Mfec and Rfec
PLL Simulator Tool Available
for additional product information.
C
POST
C
POST
VC
nVC
R
POST
nOP_OUT
OP_OUT
R
POST
R
LOOP
R
LOOP
C
LOOP
C
LOOP
OP_IN
nOP_IN
Example External Loop Filter Component Values
for M2050-11-644.5313 and M2050-11-669.6429
VCSO Parameters: KVCO = 800kHz/V, RIN = 100k (pin NBW = 0), VCSO Bandwidth = 700kHz.
Device Configuration
Example Loop Filter Component Values
Nominal Performance With Values
F Ref
(MHz)
F VCSO
(MHz)
FIN_
FEC_
... SEL1:0
Mfin M R
Phase Det.
Freq. (MHz)
R Loop
C Loop
R Post
C Post
PLL Loop
Bandwidth
Damping
Factor
Passband
Peaking (dB)
Post Filter
Bandwidth
125.00
644.5313 0 1 0 0 5 33 32
3.9063
61.9k
1.0F 59.0k 1000pF 577Hz 6.8
0.043
2.7kHz
125.00
669.6429 0 1 1 0 5 15 14
8.9286
44.2k
1.0F 38.3k 1000pF 908Hz 7.2
0.039
4.1kHz
Example External Loop Filter Component Values
for M2051-11-625.0000
VCSO Parameters: KVCO = 800kHz/V, RIN = 100k (pin NBW = 0), VCSO Bandwidth = 700kHz.
Device Configuration
Example Loop Filter Component Values
Nominal Performance With Values
F Ref
(MHz)
F VCSO
(MHz)
FIN_
FEC_
...SEL1:0
Mfin M R
Phase Det.
Freq. (MHz)
R Loop
C Loop
R Post
C Post
PLL Loop
Bandwidth
Damping
Factor
Passband
Peaking (dB)
Post Filter
Bandwidth
644.5313 625.0000 1 1 0 0
32 33 19.5313
28.0k
1.0F 15.0k 1000pF 1.25kHz 7.0
0.04
10.6kHz
Example External Loop Filter Component Values1
for M2052-11-644.5313
VCSO Parameters: KVCO = 800kHz/V, RIN = 100k (pin NBW = 0), VCSO Bandwidth = 700kHz.
Device Configuration
Example Loop Filter Component Values
Nominal Performance With Values
F Ref
(MHz)
F VCSO
(MHz)
FIN_
FEC_
...SEL1:0
Mfin M R
Phase Det.
Freq. (MHz)
R Loop
C Loop
R Post
C Post
PLL Loop
Bandwidth
Damping
Factor
Passband
Peaking (dB)
Post Filter
Bandwidth
693.4830 644.5313 1 1 0 0 1 79 85
8.1586
51.0k
1.0F 33.2k 1000pF 986Hz 8.1
0.031
4.8kHz
Note 1: K
VCO , VCSO Bandwidth, Mfin x Mfec Divider Value, and External Loop Filter Component Values determine Loop Bandwidth, Damping
Factor, and Passband Peaking. For PLL Simulator software, go to www.icst.com.
相關PDF資料
PDF描述
M2050-12-627.3296 VOLTAGE CONTROLLED CLOCK SAW OSCILLATOR, 627.3296 MHz
M2050-13-625.0000 VOLTAGE CONTROLLED CLOCK SAW OSCILLATOR, 625 MHz
M2051-11-FREQ VOLTAGE CONTROLLED CLOCK SAW OSCILLATOR, 15 MHz - 700 MHz
M2051-12I690.5692 VOLTAGE CONTROLLED CLOCK SAW OSCILLATOR, 690.5692 MHz
M2051-13I670.8386 VOLTAGE CONTROLLED CLOCK SAW OSCILLATOR, 670.8386 MHz
相關代理商/技術參數(shù)
參數(shù)描述
M2050-11-644.5313 制造商:Integrated Device Technology Inc 功能描述:PLL Single 36-Pin CLCC 制造商:Integrated Device Technology Inc 功能描述:644.53125MHZ VCSO FEC PLL FOR 10GE, 3.3V CLCC36 - Bulk 制造商:Integrated Device Technology Inc 功能描述:FREQUENCY TRANSLATOR
M2050-11-644.5313T 制造商:Integrated Device Technology Inc 功能描述:FREQUENCY TRANSLATOR 制造商:Integrated Device Technology Inc 功能描述:9X9 LCC(LEAD FREE) - Tape and Reel
M2050-11-693.4830 制造商:Integrated Device Technology Inc 功能描述:FREQUENCY TRANSLATOR 制造商:Integrated Device Technology Inc 功能描述:9X9 LCC(LEAD FREE) - Bulk
M2050-11-693.4830T 制造商:Integrated Device Technology Inc 功能描述:FREQUENCY TRANSLATOR 制造商:Integrated Device Technology Inc 功能描述:9X9 LCC(LEAD FREE) - Tape and Reel
M2050-11I644.5313 制造商:ICS 制造商全稱:ICS 功能描述:SAW PLL FOR 10GBE 64B/66B FEC
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