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| 型號： | M2004-42-622.0800 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 2004 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36 |
| 封裝： | 9 X 9 MM, CERAMIC, LCC-36 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 403K |
| 代理商： | M2004-42-622.0800 |
M2004-x2 Datasheet Rev 1.3
2 of 10
Revised 10Sep2003
Integr ate d Circuit Systems , In c. ● Comm unication s Modules ● www.icst.com ● tel (508) 852-5400
M2004-X2
FREQUENCY TRANSLATION PLL FAMILY
Preliminar y In f o r m atio n
PIN DESCRIPTIONS
Number
Name
I/O
Configuration
Description
1, 2, 3, 10, 14, 26
GND
Ground
Power supply ground connections.
4
9
OP_IN
nOP_IN
Input
External loop filter connections. See Figure 4,
5
8
nOP_OUT
OP_OUT
Output
6
7
nVC
VC
Input
11, 19, 33
VCC
Power
Power supply connection, connect to +3.3V.
12
13
N0
N1
Input
Internal pull-down resistor1
Note 1: For typical values of internal pull-down and pull-up resistors, see
N divider (output divider) inputs N1:N0.
LVCMOS/LVTTL. See Table 6, N Divider Pin
Selection, on pg. 3.
15
16
FOUT
nFOUT
Output
No internal terminator
Clock output pair. Differential LVPECL.
17
MR
Input
Internal pull-down resistor1
Reset:
Logic 1 resets M and N dividers and forces
FOUT
to LOW and nFOUT to HIGH.
Logic 0 enables the outputs.
LVCMOS/LVTTL.
18
20
21
NC
No connection.
22
REF_SEL
Input
Internal pull-down resistor1
Reference clock input selection. LVCMOS/LVTTL.
See Table 4, Reference Clock Input Selection, on
pg. 3. REF_SEL triggers Hitless Switching (HS/PBO)
when toggled.
23
24
nDIF_REF
Input
Internal pull-UP resistor1
Reference clock input pair.
Differential LVPECL or LVDS.
DIF_REF
Internal pull-down resistor1
25
REF_CLK
Input
Internal pull-down resistor1
Reference clock input. LVCMOS/LVTTL.
27
28
29
30
31
M0
M1
M2
M3
M4
Input
Internal pull-down resistor1
M divider (feedback divider) inputs M5:M0.
See Table 5, M Divider Pin Selection, on pg. 3.
32
M5
Internal pull-UP resistor1
34, 35, 36
DNC
Do Not Connect.
Table 3: Pin Descriptions
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| M2004-52-622.0800LF | 2004 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36 |
| M2004-32I622.0800LF | 2004 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36 |
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| M2004-22-622.0800LF | 2004 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), CQCC36 |
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