IGLOO Low Power Flash FPGAs
Revision 23
2-59
Table 2-86 2.5 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Applicable to Standard Plus Banks
Drive Strength
Speed Grade tDOUT tDP tDIN tPY tEOUT tZL
tZH
tLZ
tHZ tZLS tZHS Units
4 mA
Std.
0.97
2.36 0.18 1.08
0.66
2.41 2.21 1.96 1.92 6.01
5.81
ns
6 mA
Std.
0.97
1.97 0.18 1.08
0.66
2.01 1.75 2.21 2.40 5.61
5.34
ns
8 mA
Std.
0.97
1.97 0.18 1.08
0.66
2.01 1.75 2.21 2.40 5.61
5.34
ns
12 mA
Std.
0.97
1.75 0.18 1.08
0.66
1.79 1.52 2.38 2.70 5.39
5.11
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values. Table 2-87 2.5 V LVCMOS Low Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Applicable to Standard Banks
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
Std.
0.97
4.27
0.18
1.04
0.66
4.06
1.71
1.62
ns
4 mA
Std.
0.97
4.27
0.18
1.04
0.66
4.36
4.06
1.71
1.62
ns
6 mA
Std.
0.97
3.54
0.18
1.04
0.66
3.61
3.48
1.95
2.08
ns
8 mA
Std.
0.97
3.54
0.18
1.04
0.66
3.61
3.48
1.95
2.08
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values. Table 2-88 2.5 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Applicable to Standard Banks
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
Std.
0.97
2.24
0.18
1.04
0.66
2.29
2.09
1.71
1.68
ns
4 mA
Std.
0.97
2.24
0.18
1.04
0.66
2.29
2.09
1.71
1.68
ns
6 mA
Std.
0.97
1.88
0.18
1.04
0.66
1.92
1.63
1.95
2.15
ns
8 mA
Std.
0.97
1.88
0.18
1.04
0.66
1.92
1.63
1.95
2.15
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-7 for derating values.