2-26 Revision 13 3.3 V LVCMOS Wide Range Table 2-29 Minimum and Maximum DC Input and Out" />
參數(shù)資料
型號： M1A3PE3000-2PQ208I
廠商： Microsemi SoC
文件頁數(shù)： 98/162頁
文件大?。?/td> 0K
描述： IC FPGA 1KB FLASH 3M 208-PQFP
標準包裝： 24
系列： ProASIC3E
RAM 位總計： 516096
輸入/輸出數(shù)： 147
門數(shù)： 3000000
電源電壓： 1.425 V ~ 1.575 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 85°C
封裝/外殼： 208-BFQFP
供應商設備封裝： 208-PQFP（28x28）
ProASIC3E DC and Switching Characteristics
2-26
Revision 13
3.3 V LVCMOS Wide Range
Table 2-29 Minimum and Maximum DC Input and Output Levels
3.3 V
LVCMOS
Wide
Range
Equivalent
Software
Default
Drive
Strength
Option1
VIL
VIH
VOL
VOH
IOL IOH IOSL
IOSH
IIL2 IIH3
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VA A
Max.
mA4
Max.
mA4
A5 A5
100 A
2 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
27
25
10 10
100 A
4 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
27
25
10 10
100 A
6 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
54
51
10 10
100 A
8 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
54
51
10 10
100 A
12 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
109
103
10 10
100 A
16 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
127
132
10 10
100 A
24 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
181
268
10 10
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
3. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN< VCCI. Input current is
larger when operating outside recommended ranges.
4. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
5. Currents are measured at 85°C junction temperature.
6. Software default selection highlighted in gray.
Figure 2-7 AC Loading
Table 2-30 3.3 V LVCMOS Wide Range AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
CLOAD (pF)
0
3.3
1.4
–
35
Note: *Measuring point = Vtrip. See Table 2-15 on page 2-18 for a complete table of trip points.
Test Point
Enable Path
Datapath
35 pF
R = 1 k
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
35 pF for tZH / tZHS / tZL / tZLS
35 pF for tHZ / tLZ
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相關代理商/技術參數(shù)
參數(shù)描述
M1A3PE3000-2PQ896 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE3000-2PQ896ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
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M1A3PE3000-2PQ896PP 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE3000-2PQG208 功能描述:IC FPGA 1KB FLASH 3M 208-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3E 產(chǎn)品培訓模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標準包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應商設備封裝:484-FBGA（23x23）
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