參數(shù)資料
型號： M1A3PE1500-2FGG676I
廠商： Microsemi SoC
文件頁數(shù)： 57/162頁
文件大?。?/td> 0K
描述： IC FPGA 1KB FLASH 1.5M 676-FBGA
標(biāo)準(zhǔn)包裝： 40
系列： ProASIC3E
RAM 位總計： 276480
輸入/輸出數(shù)： 444
門數(shù)： 1500000
電源電壓： 1.425 V ~ 1.575 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 85°C
封裝/外殼： 676-BGA
供應(yīng)商設(shè)備封裝： 676-FBGA（27x27）
Revision 13
2-1
2 – ProASIC3E DC and Switching Characteristics
General Specifications
DC and switching characteristics for –F speed grade targets are based only on simulation.
The characteristics provided for the –F speed grade are subject to change after establishing FPGA
specifications. Some restrictions might be added and will be reflected in future revisions of this
document. The –F speed grade is only supported in the commercial temperature range.
Operating Conditions
Stresses beyond those listed in Table 2-1 may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings are stress ratings only; functional operation of the device at these or any
other conditions beyond those listed under the Recommended Operating Conditions specified in
.
Table 2-1 Absolute Maximum Ratings
Symbol
Parameter
Limits
Units
VCC
DC core supply voltage
–0.3 to 1.65
V
VJTAG
JTAG DC voltage
–0.3 to 3.75
V
VPUMP
Programming voltage
–0.3 to 3.75
V
VCCPLL Analog power supply (PLL)
–0.3 to 1.65
V
VCCI 2
DC I/O output buffer supply voltage
–0.3 to 3.75
V
VMV 2
DC I/O input buffer supply voltage
–0.3 to 3.75
V
VI
I/O input voltage
–0.3 V to 3.6 V (when I/O hot insertion mode is enabled)
–0.3 V to (VCCI + 1 V) or 3.6 V, whichever voltage is lower
(when I/O hot-insertion mode is disabled)
V
TSTG 3
Storage temperature
–65 to +150
°C
TJ 3
Junction temperature
+125
°C
Notes:
1. The device should be operated within the limits specified by the datasheet. During transitions, the input signal may
undershoot or overshoot according to the limits shown in Table 2-3 on page 2-2.
2. VMV pins must be connected to the corresponding VCCI pins. See the "VMVx I/O Supply Voltage (quiet)" section on
page 3-1 for further information.
3. For flash programming and retention maximum limits, refer to Table 2-3 on page 2-2, and for recommended operating
limits, refer to Table 2-2 on page 2-2.
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