ARM CortexTM-M1
Prod uct Br ief
3
ARM Cortex-M1–Enabled FPGAs
ARM Cortex-M1 is available for use in a growing number
of
Actel
M1
devices.
These
include
M1AFS600,
M1AGL600, M1A3P1000, and a number of additional M1
devices. The devices listed have the features shown in the
following sections:
M1AFS600 Fusion
Actel Fusion Programmable System Chips (PSCs) are the
world’s first mixed-signal FPGAs. Fusion integrates a
12-bit analog-to-digital converter, as many as 40 analog
I/Os, up to 8 Mbits of flash memory, and FPGA fabric all
in a single device. When used in conjunction with a soft
processor such as ARM Cortex-M1, Actel Fusion devices
represent the definitive soft MCU platform.
M1AFS600 Features
Industry’s first mixed-signal FPGA
600,000 system gates – 13,824 logic tiles
ARM Cortex-M1 uses less than 30% of FPGA logic
4 Mbits flash, 108 kbits SRAM
30 analog inputs, 10 analog outputs
172 digital I/Os
2 PLLs, 1% RC oscillator, Xtal oscillator, RTC
M1AGL600 IGLOO FPGAs
The M1 IGLOO devices are reprogrammable, full-
featured flash FPGAs designed to meet the demanding
power and area requirements of today's portable
electronics. Featuring Flash*Freeze technology and
with operating voltages of 1.2 V / 1.5 V, these devices
offer the industry's lowest power consumption. M1
IGLOO
devices
give
designers
a
flexible
system
construction platform for building portable products
that offer maximum battery life.
M1AGL600 Features
Ultra-low power flash-based FPGA
600,000 system gates – 13,824 logic tiles
ARM Cortex-M1 uses less than 33% of FPGA logic
144 kbits SRAM, 235 digital I/Os
M1A3P1000 ProASIC3/E FPGAs
ProASIC3/E devices, the third generation of Actel Flash
FPGAs, offer industry-leading unit cost and lowest total
system cost—up to 504 kbits of SRAM, 350 MHz
operation, and best-in-class logic utilization. These
single-chip FPGAs require no boot ROMs or other
support chips and are highly secure, with 128-bit AES
encryption and FlashLock technology.
M1A3P1000 Features
Low-cost flash-based FPGA
1,000,000 system gates – 24,576 logic tiles
ARM Cortex-M1 uses less than 20% of FPGA logic
144 kbits SRAM
300 digital I/Os
Table 1
ARM Cortex-M1 Utilization Data
Device
Variant
Size (tiles)
RVDS
Size (tiles)
FlashPro
RAM Blocks
Device
Utilization (%)
M1 Fusion
No debug
4,452
–
4
M1AFS600
31
With debug
–
9,272
9,462
4
M1AFS600
68
M1 IGLOO 1.5 V
No debug
4,435
–
4
M1AGL600
31
With debug
–
9,250
9,440
4
M1AGL600
68
M1 IGLOO 1.2 V
No debug
4,435
–
4
M1AGL600
31
With debug
–
9,250
9,440
4
M1AGL600
68
M1 ProASIC3/E
No debug
4,435
–
4
M1A3PE1500
12
With debug
–
9,250
9,440
4
M1A3PE1500
25
Note: Configuration is 0 kbytes ITCM, 0 kbytes DTCM, small multiplier, 1interrupt, no OS extensions, little-endian, and debug as shown.