參數(shù)資料
型號(hào)： M13S128168A
廠商： Elite Semiconductor Memory Technology Inc.
英文描述： 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
中文描述： 200萬(wàn)× 16位× 4個(gè)銀行雙倍數(shù)據(jù)速率SDRAM
文件頁(yè)數(shù)： 5/49頁(yè)
文件大?。?/td> 1513K
代理商： M13S128168A
ES MT
M13S128168A
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2007
Revision : 1.8 5/49
Absolute Maximum Rating
Parameter
Symbol
Value
Unit
Voltage on any pin relative to V
SS
V
IN
, V
OUT
-0.5 ~ 3.6
V
Voltage on V
DD
supply relative to V
SS
V
DD
, V
DDQ
-1.0 ~ 3.6
V
Voltage on V
DDQ
supply relative to V
SS
V
DDQ
-0.5 ~ 3.6
V
Storage temperature
T
STG
-55 ~ +150
C
°
Power dissipation
P
D
TBD
W
Short circuit current
I
OS
50
mA
Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC Operation Condition & Specifications
DC Operation Condition
Recommended operating conditions (Voltage reference to V
SS
= 0V, T
A
= 0 to 70° )
Parameter
Symbol
Min
Max
Unit
Note
Supply voltage
V
DD
2.375
2.75
V
I/O Supply voltage
V
DDQ
2.375
2.75
V
I/O Reference voltage
V
REF
0.49*V
DDQ
0.51*V
DDQ
V
1
I/O Termination voltage (system)
V
TT
V
REF
- 0.04
V
REF
+ 0.04
V
2
Input logic high voltage
V
IH
(DC)
V
REF
+ 0.15
V
DDQ
+ 0.3
V
Input logic low voltage
V
IL
(DC)
-0.3
V
REF
- 0.15
V
Input Voltage Level, CLK and CLK inputs
V
IN
(DC)
-0.3
V
DDQ
+ 0.3
V
Input Differential Voltage, CLK and CLK inputs
V
ID
(DC)
0.36
V
DDQ
+ 0.6
V
Input leakage current
I
I
-5
5
μ
A
3
Output leakage current
I
OZ
-5
5
μ
A
Output High Current (Normal strength driver)
(V
OUT
=V
DDQ
-0.373V, min V
REF
, min V
TT
)
I
OH
-16.8
mA
Output Low Current (Normal strength driver)
(V
OUT
= 0.373V)
I
OL
+16.8
mA
Output High Current (Weak strength driver)
(V
OUT
=V
DDQ
-0.763V, min V
REF
, min V
TT
)
I
OH
-9
mA
Output Low Current (Weak strength driver)
(V
OUT
= 0.763V)
I
OL
+9
mA
Notes 1. V
REF
is expected to be equal to 0.5* V
DDQ
of the transmitting device, and to track variations in the DC level of the same.
Peak-to-peak noise on V
REF
may not exceed 2% of the DC value.
2. V
TT
is not applied directly to the device. V
TT
is system supply for signal termination resistors, is expected to be set equal
to V
REF
, and must track variations in the DC level of V
REF
.
3. V
ID
is the magnitude of the difference between the input level on CLK and the input level on CLK .
相關(guān)PDF資料
PDF描述
M13S128168A-5BG 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-5T 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-5TG 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-6BG 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-6T 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M13S128168A_08 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A_1 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4TG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-5BG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:2M x 16 Bit x 4 Banks Double Data Rate SDRAM
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*