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參數資料
| 型號： | M-986-2R2 |
| 廠商： | Clare, Inc. |
| 英文描述： | MFC Transceivers |
| 中文描述： | MFC的收發(fā)器 |
| 文件頁數： | 7/13頁 |
| 文件大?。?/td> | 499K |
| 代理商： | M-986-2R2 |
Reset (RS) Timing
Parameter
Test Conditions
R
L
= 825
C
L
= 100 pF
Min
-
-
-
50
245
Max
75
200
200
-
-
Unit
ns
ns
ns
ns
ns
t
dis
(R)
t
d12
t
d13
t
su
(R)
tw(R)
Data bus disable time after RS
Delay time from RS
↓
to high-impedance SCLK
Delay time from RS
↓
to high-impedance DX1, DX0
Reset (RS) setup time prior to CLKOUT
RS pulse duration
Coprocessor Interface Timing
Parameter
Min
-
-
-
25
30
25
80
60
-
Nom
-
-
-
-
-
-
-
-
-
Max
75
75
80
-
-
-
-
-
1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ms
t
d
(R-A)
t
d
(W-A)
t
a
(RD)
t
h
(RD)
t
su
(WR)
t
h
(WR)
t
w
(RDL)
t
w
(WRL)
t
wr
(RBLE)
RD low to TBLF high
WR low to RBLE high
RD low to data valid
Data hold time after RD high
Data setup time prior to WR high
Data hold time after WR high
RD low-pulse duration
WR low-pulse duration
RBLE
↑
to RBLE
↓
M-986-2A1
www.clare.com
7
Rev. 3
CLKOUT Timing Parameters
Parameter
Test Conditions
Min
195.27
-
-
25
-
Nom
195.31
10
8
-
-
Max
195.35
-
-
60
1/4t
c(C)
+75
Unit
ns
ns
ns
ns
ns
t
c(C)
t
r(C)
t
f(C)
t
d(MCC)
t
d 8
CLKOUT cycle time
CLKOUT rise time
CLKOUT fall time
Delay time CLKIN
↑
to CLKOUT
↓
Delay time CLKOUT
↓
to data bus OUT valid
R
L
= 825
C
L
= 100 pF
Transmitter Characteristics
Parameter
Test Conditions
From nominal
High/low
Per component
Between components
Min
-
-
-7.40
-
-
Typ
-
-
-7.00
-
-
Max
±1
±0.5
-6.60
0
-30
Unit
Hz
dB
dBm0
ms
dB
F
OS
TW
A
S
T
S
P
hi
Frequency offset
Twist
Signal amplitude
Time skew
Power due to extraneous components
-
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