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參數(shù)資料
| 型號： | LZ93BE0 |
| 廠商： | Sharp Corporation |
| 英文描述： | Timing Pulse Generator LSI for CCD |
| 中文描述： | 時序脈沖發(fā)生器LSI的防治荒漠化公約 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大?。?/td> | 404K |
| 代理商： | LZ93BE0 |
SYMBOL
PIN NAME
FUNCTION
An input pin to select the phase of FCDS (pin 19)
pulse and FS (pin 18) pulse.
L level : adjustable
H level or open : fixed
13
Phase control terminal
for FCDS and FS
—
Phase-adjust input
for FS
An input pin to control the phase of FS (pin 18).
SO (pin
pulse put in this terminal after make it
delay with resistor and capacitor.
14
–
Phase-adjust output
for
FS
An output pin to control the phase of FS (pin 18).
The output pulse put in
delay with resistor and capacitor.
15
so
o
(pin 14) after make it
Phase-adjust input
for FCDS
An input pin to control the phase of FCDS (pin 19).
(pin 17) pulse put in this terminal after make it
delay with resistor and capacitor.
18
cl
—
Phase-adjust output
for FCDS
An output pin to control the phase of FCDS (pin 19).
The output pulse put in Cl (pin 16) after make it
delay with resistor and capacitor.
17
co
o
A pulse to sample-hold the signal from CCD area
sensor. The phase of FS is fixed if CH (pin 13)
equals H level and it can be adjustable if CH (pin
13) equals L level.
18
FS
o
Sample-hold pulse
output
A pulse to clamp the feed-through level form CCD
area sensor. The phase of FCDS is fixed if CH (pin
13) equals H level and it can be adjustable if CH
(pin
equals L level.
19
FCDS
o
n
CDS pulse output
Vcc
–
—
Power supply
Supply +5 V power.
: Input pin (CMOS level input)
:
Input pin (CMOS level input with pull-up resistor)
:
Input pin (CMOS
O, 08M, 012M : Output pin
input )
NOTE :
At
the input pin, the rising edge of HDI (pin 6) is 20 ns shorter than that of CKI (pin 9).
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