參數(shù)資料
型號(hào): LX8816-04CDF
廠商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection
中文描述: DUAL OUTPUT, FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, PSSO5
封裝: ROHS COMPLIANT, PLASTIC, SPAK-5
文件頁數(shù): 2/9頁
文件大?。?/td> 375K
代理商: LX8816-04CDF
Microsemi
Integrated Products
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 2
Copyright
2000
Rev. 1.2a, 2002-11-01
W
M
.
C
LX8816
Dual Channel 1A Low Dropout Regulator
P
RODUCTION
D
ATA
S
HEET
I N T E G R A T E D P R O D U C T S
A B S O L U T E M A X I M U M R A T I N G S
Input Voltage (V
BAT
)..................................................................................................13.5V
Load Current (Internally Limited)...................................................................................1A
Power Dissipation...................................................................................Internally Limited
Short-Circuit Protection....................................................................................... Indefinite
Operating Junction Temperature................................................................................150
°
C
Lead Temperature (Soldering 180 seconds)...............................................................235
°
C
Note:
Exceeding these ratings could cause damage to the device. All voltages are with respect to
Ground. Currents are positive into, negative out of specified terminal.
T H E R M A L D A T A
DF
Plastic S-Pak 5-Pin
T
HERMAL
R
ESISTANCE
-J
UNCTION TO
T
AB
,
θ
JT
T
HERMAL
R
ESISTANCE
-J
UNCTION TO
A
MBIENT
,
θ
J
A
4.5°C/W
24.5°C/W
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
θ
JA
can vary from 25
°
C/W to >
40
°
C/W depending on mounting technique. (See Application Notes Section: Thermal
considerations)
P A C K A G E P IN O U T
1
2
3
4
5
V
2
V
1
GND
ADJ
V
IN
Tab is GND
DF P
ACKAGE
(Top View)
F U N C T I O N A L P I N D E S C R I P T I O N
P
IN
N
AME
D
ES CRIPT ION
V
IN
Positive unregulated supply input for the regulator. Bypass to GND with at least 2.2μF capacitance having low
ESR for good transient response.
ADJ
Adjustable Input
.
The output voltage can be set by two external resistors with the following relationship: V
1
= V
REF
* (1 + R1 / R2) + I
ADJ
* R1 where R1 is the resistor connected between V
1
and ADJ, and R2 is the resistor
connected between ADJ and GND.
Common terminal for ground reference.
The input and output bypass capacitors should be connected to this
pin. In addition the tab on the S-Pak package and pin 3 are also used for heat sinking the device.
Adjustable regulator output (Regulator #1) It is recommended to bypass to GND with at least 2.2uF. Size your
output capacitor to meet the transient loading requirement. If you have a very dynamic load, a lower ESR
capacitor will improve the response to these load steps.
Fixed regulator output (Regulator #2). It is recommended to bypass to GND with at least 2.2μF. Size your output
capacitor to meet the transient loading requirement. For dynamic loads, a lower ESR capacitor will improve the
response to these load steps.
GND
V
1
V
2
P
A
C
K
A
G
E
D
A
T
A
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