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參數(shù)資料
| 型號： | LX8385B-05CDLT |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | THREE-TERMINAL POSITIVE FIXED VOLTAGE REGULATORS |
| 中文描述： | 三端固定電壓調(diào)節(jié)器 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 143K |
| 代理商： | LX8385B-05CDLT |
Microsemi
Linfinity Microelectronics Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 6
Copyright
2000
Rev. 2.1d, 2001-03-15
W
M
.
LX8384x-xx
5A Low Dropout Positive Regulators
P
RODUCTION
A M I C R O S E M I C O M P A N Y
OVERLOAD RECOVERY (continued)
voltage across the regulator at the time the short circuit is
removed from the output. If this limited current is not sufficient
to develop the designed voltage across the output resistor,
the
voltage will stabilize at some lower value, and will never reach
the designed value. Under these circumstances, it may be
necessary to cycle the input voltage down to zero in order to
make the regulator output voltage return to regulation.
RIPPLE REJECTION
Ripple rejection can be improved by connecting a capacitor
between the ADJ pin and ground. The value of the capacitor
should be chosen so that the impedance of the capacitor is equal
in magnitude to the resistance of
R1 at the ripple frequency
. The
capacitor value can be determined by using this equation:
(
.
)
1
R
28
1
F
C
R
×
×
=
where:
C
F
R
R
1
the value of the capacitor in Farads; select
an equal or larger standard value.
the ripple frequency in Hz
the value of resistor R1 in ohms
At a Ripple frequency of 120Hz, with R1= 100
1
×
×
The closest equal or larger standard value should be used, in
this case, 15μF. When an ADJ pin bypass capacitor is used,
output ripple amplitude will be essentially independent of the
output voltage. If an ADJ pin bypass capacitor is not used, output
ripple will be proportional to the ratio of the output voltage to the
reference voltage:
V
=
M
(
.
)
Hz
3
13
100
120
28
=
=
C
REF
OUT
V
where:
M
V
REF
= 1.25V
a multiplier for the ripple seen when the
ADJ pin is optimally bypassed.
For example, if
V
OUT
= 2.5V the output ripple will be:
2
25
.
5
=
=
V
V
M
Output ripple will be twice as bad as it would be if the ADJ
pin were to be bypassed to ground with a properly selected
capacitor.
OUTPUT VOLTAGE
The LX8384/84A/84B ICs develop a 1.25V reference voltage
between the output and the adjust terminal (See Figure 2). By
placing a resistor, R1, between these two terminals, a constant
current is caused to flow through R1 and down through R2 to set
the overall output voltage. Normally this current is the specified
minimum load current of 10mA. Because I
ADJ
is very small and
constant when compared with the current through R1, it
represents a small error and can usually be ignored.
LX8384x
R1
R2
IN
ADJ
I
50μA
OUT
FIGURE 2
- BASIC ADJUSTABLE REGULATOR
V
IN
V
REF
V
OUT
2
1
2
1
R
I
R
R
V
V
ADJ
REF
OUT
+
+
=
LOAD REGULATION
Because the LX8384/84A/84B regulators are three-terminal
devices, it is not possible to provide true remote load sensing.
Load regulation will be limited by the resistance of the wire
connecting the regulator to the load. The data sheet specification
for load regulation is measured at the bottom of the package.
Negative side sensing is a true Kelvin connection, with the
bottom of the output divider returned to the negative side of the
load. Although it may not be immediately obvious, best load
regulation is obtained when the top of the resistor divider, (
R
1), is
connected
directly
to the case of the regulator,
not to the load
.
This is illustrated in Figure 3. If
R
1 were connected to the load,
the effective resistance between the regulator and the load would
be:
+
×
=
1
1
2
R
R
R
R
R
P
Peff
where:
When the circuit is connected as shown in Figure 3, the
parasitic resistance appears as its actual value, rather than the
higher
R
Peff
.
R
P
Actual parasitic line resistance.
LX8384x
R
P
Parasitic Line
Resistance
R
L
R2
IN
ADJ
OUT
FIGURE 3
- CONNECTIONS FOR BEST LOAD REGULATION
R1
V
IN
Connect R1 to
Case of Regulator
Connect R2 to
Load
A
P
P
L
I
C
A
T
I
O
N
S
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