
LX2202
P
RODUCTION
D
ATA
S
HEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 3
Copyright
2004
Rev. 1.0, 2005-03-18
W
M
.
C
2A Li-Ion Linear Charger and Power Control
TM
E L E C T R I C A L C H A R A C T E R I S T I C S
Unless otherwise specified, the following specifications apply over the ambient temperature 0
°
C
≤
T
A
≤
70
°
C except where otherwise
noted and the following test conditions: VDD = 5.0V, VM = GND, VID0 = VID1 = VBAT, RCCP = 72.3k, RCTP = 105k, RUSB =
2.55k.
LX2202
Typ
Parameter
Symbol
Test Conditions
Min
Max
Units
`
`
`
MAIN CIRCUITRY
Input Voltage
USB Input voltage
Under Voltage Charging Lockout
VDD
V
USB
VDD
UVLO
VBAT = 0; Rising VDD
VDD > V
BAT
VDD < V
BAT
VDD < V
BAT
, VID0 = VID1 = 0V
I
BAT
> 100mA
4.5
4.35
6
6
V
V
V
mA
μA
μA
V
V
V
3.60
2.1
20
9
1.26
1.26
2.6
3.85
4
40
15
Quiescent Current
I
GND
CTP Bias Voltage
CCP Bias Voltage
CUS Bias Voltage
CONSTANT VOLTAGE MODE
V
CTP
V
CCP
V
CUS
VM = Lo; -40C to 125C
VM = Hi; -40 to 125C
4.16
4.06
96
4.2
4.1
97
4.24
4.14
98
Constant Voltage Charge Voltage
V
CVL
V
Top Off Charge Droop Threshold
CONSTANT CURRENT MODE
BAT Constant Current Accuracy
V
DRP
BAT
V
CVL
V
%
I
CCL
0.85
1
1.15
A
Conditioning Current
I
COND
V
BAT
< V
CTV
; @25°C
3.0
4.6
6.0
BAT
I
CCL
%
I
Conditioning Current Mode
Threshold Voltage
Charge Termination Current
Accuracy
USB CURRENT LIMIT
USB Low Current Limit
USB High Current Limit
LOGIC
STAT Logic High Output
STAT Logic Low Output
V
CTV
2.8
V
I
BAT
@25°C
35
50
65
mA
`
`
`
`
`
`
I
IN
I
IN
V
USB
= 5V, VDD < V
USB
, VID1 = Lo
V
USB
= 5V, VDD < V
USB
, VID1 = Hi
85
425
93
463
100
500
mA
mA
V
STAT
V
STAT
V
USB
= 5.0V, I
STAT
= -5mA
V
= 5.0V, I
STAT
= 25μA
Logic Hi
Logic Lo
Logic Hi
Logic Lo
4.5
5
V
V
0.4
0.8
0.8
2.0
2.0
State Select Threshold
V
VID
V
VM Select Threshold
V
VM
V
THERMAL SHUTDOWN
Maximum Junction Temperature
BI-DIRECTIONAL PASS ELEMENT CONTROL
Discharge Switch On Resistance
Charging Threshold
Discharging Threshold
Pass Element Switch Mode Delay
PSW FET DRIVER
High Output Voltage
Low Output Voltage
ORing Resistance
Switch Delay (after tsw)
HEAD ROOM
T
J
V
USB
= 5.0V, I
OUT
= 1A, Temperature Rising
130
140
150
°C
R
DS(ON)
V
CHG
V
DCH
tsw
I
BAT
= -1A (Not Tested)
V
USB
> V
BAT
+ V
CHG
V
USB
< V
BAT
+ V
DCH
Charge–to–discharge or Discharge–to–charge
130
40
60
5
150
10
m
mV
mV
μs
V
PSW
V
PSW
R
PSW
t
PSW
V
USB
< V
BAT
, I
PSW
= 0, V
BAT
= 4.2V
V
USB
> V
BAT
, I
PSW
= 0
C
PSW
= 1000pF, to V
PSW
= (V
BAT
– 1V)
4.1
5
0
4.2
0
10
500
V
V
0.2
15
1000
K
Ns
Charging headroom
VDD – VBAT, I
BATT
= 5mA; not tested in
production
VBAT – VDD, I
BATT
= -20mA; not tested in
production
65
mV
Discharging headroom
65
mV
E
L
E
C
T
R
I
C
A
L
S