
D IGITAL D IMMING CCFL C ONTROLLER IC
LX1686
PRODUCT DA T ABOOK 1996/1997
3
Copyright 2000
Rev. 0.4 1/00
RangeMAXTM
P RELIMINAR Y D ATA S HEET
ELECTRICAL CHARACTERISTICS (continued)
Parameter
Symbol
Test Conditions
Units
LX1686
Min.
Typ.
Max.
Digital Dimmer Block
FVERT Input Frequency Capture Range
FR_FVERT
FVERT Logic Threshold
VTH_FVERT
Design Reference Only
FVERT Input Resistance
RFVERT
Design Reference Only
VCO Analog Output Peak Voltage
VP_VCO
VCO Analog Output Valley Voltage
VV_VCO
VCO Forced Source Current
FR_VCO_I_SRC VPD_CR = 3V, VDD = 3V
Forced VCO Oscillation Frequency
FX_VCO
AFC_C = 0V, CVCO = 0.01F
Auto-Frequency Detection Response
TD_AFD
FVERT Frequency is 200Hz, VDD = 3V
BRITE Voltage Range
VR_BRITE
Full-Brightness Brite Input Voltage
VBRITE_FULL
VBRT_POS = VDD or float; BRITE = 2.5V
VBRT_POS = 0V, BRITE = 0.5V
Full-Darkness Brite Input Voltage
VBRITE_DARK
VBRT_POS = VDD or float BRITE = 0.5V
VBRT_POS = 0V, BRITE = 2.5V
BRITE-to-ICOMP Propagation Delay
TD_BRITE
BRITE_POS Logic Threshold
DIG_DIM Logic Threshold
40
200
Hz
VDD/2
V
50
k
2.5
V
0.65
V
-6.4
-5.8
-5.2
A
250
Hz
1000
ms
0
VDD
V
2.35
2.5
2.65
V
2.35
2.5
2.65
V
0.35
0.5
0.65
V
0.35
0.5
0.65
V
300
ns
VDD/2
V
VDD/2
V
Direct Drive PWM Block
ISNS Threshold Voltage Range
VR_ISNS
DIG_DIM = VDD
VAMP Transconductance
GM_VAMP
VCOMP = 1.25V
VAMP Output Source Current
IS_VAMP
VCOMP = 1.5V
VAMP Output Sink Current
ISK_VAMP
VCOMP = 1.5V
VAMP Output Voltage Range
VR_VAMP
VSNS Threshold Voltage
VTH_VSNS
VCOMP = VSNS
VCOMP Discharge Current
ID_VCOMP
VCOMP = 0.5V, VDD = 3V
IAMP Transconductance
GM_IAMP
BRITE = 0.5 - 2.6V
IAMP Output Source Current
IS_IAMP
ICOMP = 1.5V, VDD = 3V
IAMP Output Sink Current
ISK_IAMP
ICOMP = 1.5V, VDD = 3V
IAMP Output Voltage Range
VR_IAMP
IAMP Input Offset Voltage
TSS
CVCOMP = 1F
VCMP Input Offset Voltage
VOS_VCMP
VCOMP = 1.25V, VDD = 3V
VCOMP-to-Output Propagation Delay
TD_VCOMP
VDD = 3V
ICMP Input Offset Voltage
VOS_ICMP
ICOMP = 0.5 to 2.25V, VDD = 3V
ICOMP-to-Output Propagation Delay
TD_ICOMP
BRITE = 1.25V, RAMP_C = 2V, VDD = 3V
02.5
V
400
mho
10
50
110
A
20
70
120
A
0
VDD
V
1.12
1.25
1.38
V
0.8
1.5
10
mA
70
200
700
mho
-15
-40
-80
A
20
60
100
A
0
VDD
V
40
ms
-10
3
10
mV
250
500
ns
-10
3
10
mV
1100
ns
Output Buffer Block
Output Sink Current
ISK_OUTBUF
AOUT, BOUT = VDD = 3V
AOUT, BOUT = 1V, VDD = 3V
Output Source Current
IS_OUTBUF
AOUT, BOUT = 0V, VDD = 3V
AOUT, BOUT = 2V, VDD = 3V
25
45
80
mA
20
35
55
mA
-35
-50
-80
mA
-20
-40
-55
mA
Bias Control Block
Voltage at Pin I_R
VIR
Pin I_R Maximum Source Current
IMAX_IR
Design Reference Only
VBG Output Resistance
RO_VBG
Design Reference Only
ENABLE Logic Threshold - 3V
VEN3V
VDD = 3V
ENABLE Logic Threshold - 5.5V
VEN5.5
VDD = 5.5V
ENABLE Threshold Hysteresis - 3V
VH_EN3
ENABLE Threshold Hysteresis - 5.5V
VH_EN5.5
0.98
1.02
V
50
A
10
k
1.5
1.9
2.4
V
2.7
3.2
3.6
V
0.45
V
350
mV