參數(shù)資料
型號(hào)： LX1686
廠商： Microsemi Corporation
英文描述： Digital Dimming CCFL Controller IC
中文描述： 數(shù)字調(diào)光CCFL控制器集成電路
文件頁(yè)數(shù)： 3/5頁(yè)
文件大?。?/td> 139K
代理商： LX1686
LX1686
3
(continued)
Parameter
Symbol
Test Conditions
Units
LX1686
Typ.
Min.
Max.
Digital Dimmer Block
FVERT Input Frequency Capture Range
FVERT Logic Threshold
FVERT Input Resistance
VCO Analog Output Peak Voltage
VCO Analog Output Valley Voltage
VCO Forced Source Current
Forced VCO Oscillation Frequency
Auto-Frequency Detection Response
BRITE Voltage Range
Full-Brightness Brite Input Voltage
F
R_FVERT
V
TH_FVERT
R
FVERT
V
P_VCO
V
V_VCO
F
R_VCO_I_SRC
V
PD_CR
= 3V, VDD = 3V
F
X_VCO
AFC_C = 0V, C
VCO
= 0.01μF
T
D_AFD
FVERT Frequency is 200Hz, VDD = 3V
V
R_BRITE
V
BRITE_FULL
V
BRT_POS
= VDD or float; BRITE = 2.5V
V
BRT_POS
= 0V, BRITE = 0.5V
V
BRITE_DARK
V
BRT_POS
= VDD or float BRITE = 0.5V
V
BRT_POS
= 0V, BRITE = 2.5V
T
D_BRITE
Design Reference Only
Design Reference Only
Full-Darkness Brite Input Voltage
BRITE-to-ICOMP Propagation Delay
BRITE_POS Logic Threshold
DIG_DIM Logic Threshold
Direct Drive PWM Block
ISNS Threshold Voltage Range
VAMP Transconductance
VAMP Output Source Current
VAMP Output Sink Current
VAMP Output Voltage Range
VSNS Threshold Voltage
VCOMP Discharge Current
IAMP Transconductance
IAMP Output Source Current
IAMP Output Sink Current
IAMP Output Voltage Range
IAMP Input Offset Voltage
VCMP Input Offset Voltage
VCOMP-to-Output Propagation Delay
ICMP Input Offset Voltage
ICOMP-to-Output Propagation Delay
Output Buffer Block
Output Sink Current
40
200
Hz
V
k
V
V
μA
Hz
ms
V
V
V
V
V
ns
V
V
VDD/2
50
2.5
0.65
-5.8
250
1000
-6.4
-5.2
0
VDD
2.65
2.65
0.65
0.65
2.35
2.35
0.35
0.35
2.5
2.5
0.5
0.5
300
VDD/2
VDD/2
V
R_ISNS
G
M_VAMP
I
S_VAMP
I
SK_VAMP
V
R_VAMP
V
TH_VSNS
I
D_VCOMP
G
M_IAMP
I
S_IAMP
I
SK_IAMP
V
R_IAMP
T
SS
V
OS_VCMP
T
D_VCOMP
V
OS_ICMP
T
D_ICOMP
DIG_DIM = VDD
VCOMP = 1.25V
VCOMP = 1.5V
VCOMP = 1.5V
VCOMP = VSNS
VCOMP = 0.5V, VDD = 3V
BRITE = 0.5 - 2.6V
ICOMP = 1.5V, VDD = 3V
ICOMP = 1.5V, VDD = 3V
C
VCOMP
= 1μF
VCOMP = 1.25V, VDD = 3V
VDD = 3V
ICOMP = 0.5 to 2.25V, VDD = 3V
BRITE = 1.25V, RAMP_C = 2V, VDD = 3V
0
2.5
V
400
50
70
μmho
μA
μA
V
V
mA
μmho
μA
μA
V
ms
mV
ns
mV
ns
10
20
0
1.12
0.8
70
-15
20
0
110
120
VDD
1.38
10
700
-80
100
VDD
1.25
1.5
200
-40
60
40
3
250
3
1100
-10
10
500
10
-10
I
SK_OUTBUF
AOUT, BOUT = VDD = 3V
AOUT, BOUT = 1V, VDD = 3V
AOUT, BOUT = 0V, VDD = 3V
AOUT, BOUT = 2V, VDD = 3V
Output Source Current
I
S_OUTBUF
25
20
-35
-20
45
35
-50
-40
80
55
-80
-55
mA
mA
mA
mA
Bias Control Block
Voltage at Pin I_R
Pin I_R Maximum Source Current
VBG Output Resistance
ENABLE Logic Threshold - 3V
ENABLE Logic Threshold - 5.5V
ENABLE Threshold Hysteresis - 3V
ENABLE Threshold Hysteresis - 5.5V
V
IR
I
MAX_IR
R
O_VBG
V
EN3V
V
EN5.5
V
H_EN3
V
H_EN5.5
Design Reference Only
Design Reference Only
VDD = 3V
VDD = 5.5V
0.98
1.02
V
50
10
1.9
3.2
0.45
350
μA
k
V
V
V
mV
1.5
2.7
2.4
3.6
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