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參數(shù)資料
| 型號(hào)： | LVX4052 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Analog Multiplexer/Demultiplexer High−Performance Silicon−Gate CMOS |
| 文件頁(yè)數(shù)： | 3/14頁(yè) |
| 文件大?。?/td> | 157K |
| 代理商： | LVX4052 |
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MC74LVX4052
http://onsemi.com
3
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Tested to EIA/JESD22A114A.
2. Tested to EIA/JESD22A115A.
3. Tested to JESD22C101A.
4. Tested to EIA/JESD78.
0.5
(Referenced to V
EE
)
0.5 to
7.0
V
IS
Analog Input Voltage
V
EE
0.5 to V
CC
V
V
IN
Digital Input Voltage
(Referenced to GND)
0.5 to 7.0
V
STG
L
J
mW
mA
P
Power Dissipation in Still Air,
JA
SOIC
164
R
ESD
I
LATCHUP
Latchup Performance
Above V
CC
and Below GND at 125
°
C (Note 4)
300
Charged Device Model (Note 3)
200
1000
V
RECOMMENDED OPERATING CONDITIONS
EE
V
IS
T
A
t
r
, t
f
Analog Input Voltage
Operating Temperature Range, All Package Types
V
EE
55
(Referenced to V
EE
)
2.5
V
CC
125
6.0
V
V
V
IN
Digital Input Voltage
(Note 5) (Referenced to GND)
0
6.0
V
20
C
V
CC
V
= 3.0 V
0
0
100
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature
°
C
Time, Hours
Time, Years
80
1,032,200
117.8
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
1
1
10
100
1000
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Figure 3. Failure Rate vs. Time Junction Temperature
N
TIME, YEARS
T
J
T
J
T
J
T
J
T
J
T
J
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