參數(shù)資料
型號(hào)： LVU04
廠商： System Logic Semiconductor Co., Ltd.
元件分類： 電容
英文描述： CERAMIC CHIP/MIL-PRF-55681
中文描述： 陶瓷芯片/mil-prf-55681
文件頁數(shù)： 4/6頁
文件大?。?/td> 44K
代理商： LVU04
SL74LVU04
4
S ystem Logic
Semiconductor
SLS
V
min
max
min
max
min
max
I
IH
High-Level
Input Leakage
Current
V
I
= V
5.5
-
0.1
-
1.0
-
1.0
I
CC
Quiescent
Supply Current
(per Package)
V
I
=0 or V
I
O
= 0 ì A
5.5
-
4.0
-
20
-
40
ì A
I
CC1
Additional
Quiescent
Supply Current
on input
V
I
= V
- 0.6V
2.7
3.6
-
-
0.2
0.2
-
-
0.5
0.5
-
-
-
0.85
0.85
mA
AC ELECTRICAL CHARACTERISTICS
(C
L
=50 pF, t
LH
=t
HL
= 2.5 ns, R
L
=1 kù)
Guaranteed Limit
-40
°
C
÷
85
°
C
min
25
°
C
-40
°
C
÷
125
°
C
min
Symbol
Parameter
Test
Conditions
V
CC
V
Min
max
max
max
Unit
t
PHL
(t
PLH)
Propagation
Delay, Input A
to Output Y
(Figure 1 )
V
I
=0 V or
V
1
t
LH
= t
HL
=2.5 ns
L
= 50 pF
R
L
= 1 kù
1.2
2.0
2.7
3.0
4.5
-
-
-
-
-
70
22
16
13
11
-
-
-
-
-
80
26
19
15
13
-
-
-
-
-
100
31
23
18
16
ns
C
I
Input
Capacitance
5.5
-
7.0
-
-
-
-
pF
ò
à
=25
°
V
I
=0V or V
CC
pF
C
PD
Power Dissipation Capacitance (Per Inverter)
36
Used to determine the no-load dynamic power consumption:
P
D
= C
PD
V
CC
(C
L
V
CC
2
f
I
+ (C
L
V
CC
2
fo), f
I
- input frequency, fo - output frequency (MHz)
2
fo) – sum of the outputs
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