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參數(shù)資料
| 型號(hào)： | LVC573A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State |
| 中文描述： | 八路D型透明鎖存5伏/輸出三態(tài)耐壓輸入 |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大?。?/td> | 102K |
| 代理商： | LVC573A |
Philips Semiconductors
Product specification
74LVC573A
Octal D-type transparent latch with 5-volt
tolerant inputs/outputs (3-State)
1998 Jul 29
4
LOGIC DIAGRAM
LE
Q
D
D0
D
LATCH
2
D1
D
LATCH
3
D2
D
LATCH
4
D3
D
LATCH
5
D4
D
D5
D
D6
D
D7
LE
LE
LE LE
LE LE
LE LE
LE LE
LE LE
LE LE
LE LE
Q
Q
Q
Q
Q
Q
Q
SA00399
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
OE
LATCH
1
LATCH
6
LATCH
7
LATCH
8
FUNCTION TABLE
OPERATING MODES
INPUTS
INTERNAL LATCHES
OUTPUTS
OE
LE
D
n
L
H
Q
0
to Q
7
L
H
Enable and read register
(transparent mode)
L
L
H
H
L
H
Latch and read register
L
L
L
L
l
h
L
H
L
H
Latch register and
disable outputs
H
H
L
L
l
h
L
H
Z
Z
H = HIGH voltage level
h
= HIGH voltage level one setup time prior to the HIGH-to-LOW LE transition
L
= LOW voltage level
l
= LOW voltage level one setup time prior to the HIGH-to-LOW LE transition
X = Don’t care
Z
= High impedance OFF-state
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