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參數(shù)資料
| 型號(hào)： | LV7844DEV-FREQ |
| 廠商： | PLETRONICS INC |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 80 MHz - 250 MHz, LVDS OUTPUT |
| 封裝： | LEADLESS PACKAGE-4 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 159K |
| 代理商： | LV7844DEV-FREQ |
LV78D Series 3.3 V
LVDS Clock Oscillators
August 2005
www.pletronics.com
425-776-1880
5
Reliability: Environmental Compliance
Parameter
Condition
Mechanical Shock
MIL-STD-883 Method 2002, Condition A
Vibration
MIL-STD-883 Method 2007, Condition A
Solderability
MIL-STD-883 Method 2003
Thermal Shock
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Minimum Voltage
Conditions
Human Body Model
1500
MIL-STD-883 Method 3115
Charged Device Model
1000
JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Font is Arial
Bar code is 39-Full ASCII
Layout and application information
Recommend connecting Pad 1 and Pad 2 together to permit the design to accept Enable/Disable on both
input pads (see LV76D for E/D on pad 1)
For Optimum Jitter Performance, Pletronics recommends:
a ground plane under the device
no large transient signals (both current and voltage) should be routed under the device
do not layout near a large magnetic field such as a high frequency switching power supply
do not place near piezoelectric buzzers or mechanical fans.
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