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參數(shù)資料
| 型號(hào)： | LV7745GEW-FREQ-T1K |
| 廠商： | PLETRONICS INC |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 35 MHz - 220 MHz, LVDS OUTPUT |
| 封裝： | ROHS COMPLIANT, CERAMIC, LCC-6 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大小： | 114K |
| 代理商： | LV7745GEW-FREQ-T1K |
LV77F / LV77G Series 2.5 V
LVDS Clock Oscillators
December 2010
www.pletronics.com
425-776-1880
6
Mechanical:
Inches
mm
A
0.276 +
_0.006
7.00 +
_0.15
B
0.197 +
_0.006
5.00 +
_0.15
C
0.067 max
1.70 max
D
1
0.038
0.96
E
1
0.200
5.08
F
1
0.004
0.10
G
1
0.050
1.27
H
1
0.055
1.40
Not to Scale
1 Typical dimensions
I
1
0.024
0.60
J
1
0.004R
0.10R
K
1
0.008R
0.20R
Contacts (pads) :
Gold 11.8 to 39.4 inches (0.3 to 1.0 m) over Nickel 50 to 350 inches (1.27 to 8.89 m)
Pad
Function
Note
1
Output
Enable/Disable
When this pad is not connected the oscillator shall operate.
When this pad is < ‘ V disable’, the output will be inhibited (high impedance state.)
Recommend connecting this pad to V
CC if the oscillator is to be always on.
2
No connect
There is no internal connection to this pad
3
Ground (GND)
4
Output
The outputs must be terminated, 100 ohms between the outputs is the ideal
termination.
5
Output*
6
Supply Voltage
(V
CC)
Recommend connecting appropriate power supply bypass capacitors as close as
possible.
Layout and application information
Recommend connecting Pad 1 and Pad 2 together to permit the design to accept Enable/Disable input on
either pad
For Optimum Jitter Performance, Pletronics recommends:
a ground plane under the device
no large transient signals (both current and voltage) should be routed under the device
do not layout near a large magnetic field such as a high frequency switching power supply
do not place near piezoelectric buzzers or mechanical fans.
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