
LV5761V
Block Diagram
RT SYNC
5
4
EN
3
14
+
-
5V
REGULATOR
12
VIN
MODE
13
5
μA
1.25V
OCP Comp1
+
-
OCP Comp2
REFERENCE
VOLTAGE
OSP
LOGIC
+
-
VCC
Current Amp
S
R
Q
SAW WAVE
OSCILLATOR
OCP
15
MODE L 20
μA
MODE H 40
μA
5
μA
S
R
Q
+
- SD
1.1V
+
-
+
SD
0.67V
16
1
2
+
-
0.1V
SS
FB
COMP
ILIM
FFOLD
Comp
fosc forced
1/3
DMAX = 90%
1.0V
0.5V
+
-
CONTROL
Logic
UVLO
8
9
10
11
6
7 CBOOT
HDRV
SW
VDD
LDRV
GND
shut down(SD)
5V
PWM Comp
Pin Function
Pin No.
Pin name
Description
14
VIN
Power supply pin. This pin is monitored by UVLO function. When the voltage of this pin becomes 8V or more by UVLO function,
The IC starts and the soft start function operates.
11
GND
Ground pin. Each reference voltage is based on the voltage of the ground pin.
10
VDD
Power supply pin for an external the lower MOS-FET gate drive.
7
CBOOT
Bootstrap capacity connection pin. This pin becomes a GATE drive power supply of an external NchMOSFET.
Connect a bypath capacitor between CBOOT and SW.
6
SW
Pin to connect with switching node. The source of NchMOSFET connects to this pin.
5
SYNC
External synchronous signal input pin.
9
LDRV
An external the lower MOSFET gate drive pin.
8
HDRV
An external the upper MOSFET gate drive pin.
1
FB
Error amplifier reverse input pin. By operating the converter, the voltage of this pin becomes 0.67V.
The voltage in which the output voltage is divided by an external resistance is applied to this pin. Moreover, when this pin
voltage becomes 0.1V or less after a soft start ends, the oscillatory frequency becomes 1/3.
2
COMP
Error amplifier output pin. Connect a phase compensation circuit between this pin and GND.
16
SS
Pin to connect a capacitor for soft start. A capacitor for soft start is charged by using the voltage of about 5
μA.
This pin ends the soft start period by using the voltage of about 1.1V and the frequency fold back function becomes active.
15
ILIM
Reference current pin for current detection.
The sink current of about 20
μA flows to this pin when Low level (GND) is set to the MODE pin.
Also, the sink current of about 40
μA flows to this pin when High level (VIN) is set to the MODE pin.
When a resistance is connected between this pin and VIN outside and the voltage applied to the SW pin is lower than the
voltage of the terminal side of the resistance, the upper NchMOSFET is off by operating the current limiter comparator.
This operation is reset with respect to each PWM pulse.
3
EN
ON/OFF pin.
13
OCP
Pin to set the time of the timer (during double the over current detection point)
Connect a capacitor between this pin and GND. OCP charge current : 5
μA
4
RT
Pin to set the oscillation frequency. Connect a resistance between this pin and GND.
12
MODE
Pin to switch the over current detection point. Set by the low level (GND) of the ILIM pin.
Set by the high level (VIN) of the OCP pin.
When this MODE pin is set to the high level and the point of the over current detection is set by using the ILIM pin is exceeded,
the value becomes double the original value.
Also, when the MODE pin is set to the low level, the point of the over current detection remains an original value.
No.A1443-4/6