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參數(shù)資料
| 型號(hào)： | LV51132T |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | 0.150 INCH, MSOP-8 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 232K |
| 代理商： | LV51132T |
LV51132T
No.A1827-6/10
Excessive charger detection/release
If the voltage between V- pin and VSS pin becomes equal to or less than the excessive charger detection voltage by
connecting a charger, no charging can be made by turning the Cout pin “L” after delay time and turning off the
external Nch MOS FET. If that voltage returns to equal to or more than the excessive charger detection voltage
during detection delay time, the excessive charger detection will be stopped. If the voltage between V- pin and VSS
pin becomes equal to or more than the excessive charger detection voltage after excessive charger detection, the Cout
returns to “H” after delay time. The detection/return delay time is set internally.
If Dout pin is “L”, charging will be made through the parasitic diode of external Nch FET on Dout pin. In that case,
the voltage between V- pin and VSS pin is nearly -Vf which is less than the over-charger detection voltage, therefore
no excessive charger detection will be made during over-discharge, over-current and short-circuit detection.
Furthermore, if excessive voltage charger is connected to the over-discharged battery, no excessive charger detection
is made while the Dout pin is “L”. But the battery is continued charging through the parasitic diode. If the battery
voltage rises to the over-discharge detection voltage and the voltage between V- pin and VSS pin remains equal to or
less than the excessive charger detection voltage, the delay operation will be started after Dout pin turns to “H”.
0V cell charging operation
If voltage between VDD and V becomes equal to or more than the 0V cell charging lowest operation voltage when
the cell voltage is 0V, the Cout pin turns to “H” and charging is enabled.
Shorten the test time
By turning T pin to the VDD, the delay times set by the internal counter can be cut. If T pin is “open”, ”L” the delay
times are normal. Delay time not set by the counter just like as short circuit detection delay cannot be controlled by
this pin. By the substrate layout, the power-supply voltage is lowered due to an excessive current at the load short.
Therefore, we recommend that the T pin is connected to the VSS pin because the problem that this IC enters a
standby mode might be caused.
Operation in case of detection overlap
Overlap state
Operation in case of
detection overlap
State after detection
When, during over-
charge detection,
Over-discharge
detection is made,
Over-charge detection is preferred. If over-
discharge state continues even after over-
charge detection, over-discharge detection is
resumed.
When over-charge detection is made first, V- is
released. When over-discharge is detected
after over-charge detection, the standby state is
not effectuated. Note that V- is connected to
VDD via 200k.
Over-current
detection is made,
(*1) Both detections’ can be made in parallel.
Over-charge detection continues even when the
over-current state occurs. If the over-charge
state occurs first, over-current detection is
interrupted.
(*2) When over-current is detected first, V- is
connected to VSS via 30k. When over-charge
detection is made first, V- is released.
During over-discharge
detection,
Over-charge detection
is made,
Over-discharge detection is interrupted and
over-charge detection is preferred. When over-
discharge state continues even after over-
charge detection, over-discharge detection is
resumed.
The standby state is not effectuated when over-
discharge detection is made after over-charge
detection. Note that V- is connected to VDD via
200k.
Over-current
detection is made,
(*3) Both detections can be made in parallel.
Over-discharge detection continues even when
the over-current state is effectuated first. Over-
current detection is interrupted when the over-
discharge state is effectuated first,
(*4) If over-current state is made first, V- will be
connected to VSS via 30k. If over-discharge
detection is made next, V- will be disconnected
from VSS and connected to VDD via 200k to
get into stand-by mode. If over-discharge state
is made first, V- will be connected to VDD via
200k to get into stand-by mode.
Over-charge detection
is made,
(*1)
(*2)
When, during over-
current detection,
Over-discharge
detection is made,
(*3)
(*4)
(Note) Short-circuit detection can be made independently.
Excessive charger detection cannot be made during over-discharge, over-current and short-circuit detection.
And its delay time starts after the Dout pin returns to “H”.
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