參數(shù)資料
型號(hào): LV23000M
廠商: Sanyo Electric Co.,Ltd.
英文描述: Single-Chip Tuner IC for Radio/Cassette Players
中文描述: 單芯片調(diào)諧器集成電路收音機(jī)/錄音機(jī)
文件頁(yè)數(shù): 5/14頁(yè)
文件大?。?/td> 144K
代理商: LV23000M
No. 6903-5/14
LV23000M
Description of the DI Control Data
No.
Control block/data
Description
Related data
Specifies the divisor used by the programmable dividers. This is a binary value with P15 as
the MSB. The LSB depends on DVS and SNS.
(1)
Programmable
divider data
P0 to P15
DVS, SNS
Continued on next page.
DVS
SNS
LSB
Divisor setting (N)
Actual divisor
1
*
P0
272 to 65535
The actual setting times 2
0
1
P0
272 to 65535
The actual setting
0
0
P4
4 to 4095
The actual setting
Note: When P4 is the LSB, bits P0 to P3 are ignored.
Selects the input signal (FMIN or AMIN) to the programmable divider and switches the input
frequency range.
DVS
SNS
Input
Operating frequency range
1
*
FMIN
10 to 160 MHz
0
1
AMIN
2 to 40 MHz
0
0
AMIN
0.5 to 10 MHz
(2)
Reference divider data
R0 to R3
Data that selects the reference frequency (fref)
R3
R2
R1
R0
Reference frequency
0
0
0
0
25 kHz
0
0
0
1
25 kHz
0
0
1
0
25 kHz
0
0
1
1
25 kHz
0
1
0
0
12.5 kHz
0
1
0
1
6.25 kHz
0
1
1
0
3.125 kHz
0
1
1
1
3.125 kHz
1
0
0
0
5 kHz
1
0
0
1
5 kHz
1
0
1
0
5 kHz
1
0
1
1
1 kHz
1
1
0
0
3 kHz
1
1
0
1
15 kHz
1
1
1
0
PLL INHIBIT + X'tal OSC STOP
1
1
1
1
PLL INHIBIT
Note: PLL INHIBIT
In this state, the programmable divider block and the IF counter block are stopped, FMIN,
AMIN, and IFIN are pulled down (to ground), and the charge pump goes to the high-
impedance state.
(3)
IF counter control data
CTE
GT0, GT1
Measurement start data for the IF counter
CTE = 1: Start the count.
= 0: Reset the counter.
Determines the measurement time for the general-purpose counter.
GT0
GT1
Measurement time
Wait time
0
0
4 ms
3 to 4 ms
0
1
8 ms
3 to 4 ms
1
0
16 ms
3 to 4 ms
1
1
32 ms
3 to 4 ms
IFS
(* : don’t care)
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